Multi-Chip PCIE Data Transmission via Chip ID Routing
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Solution Overview
Problem
Current data transmission methods between chips are limited to high-speed mutual transmission between two chips, and do not facilitate direct data transmission among three or more chips, affecting data transmission efficiency in multi-chip scenarios.
Innovation Solution
A data transmission method that involves receiving a data packet with chip identification information, determining the target PCIE physical layer port corresponding to the chip identification information, distributing the data packet to that port, and transmitting it to the receiving chip, thereby enabling direct and high-bandwidth data transmission among multiple chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If only two chips are used for data transmission, then high-speed mutual transmission can be realized, but data transmission efficiency among three or more chips deteriorates
Solution Approach 1:
The patent segments the data transmission system into multiple independent PCIE physical layer ports, where each port can independently transmit data between chip pairs. This allows parallel data transmission among multiple chips simultaneously, transforming a single high-speed channel into multiple concurrent channels, thereby resolving the contradiction between maintaining high transmission speed and improving overall system productivity among three or more chips
Solution Approach 2:
The patent transitions from a one-to-one two-chip transmission model to a many-to-many multi-chip transmission model by introducing multiple PCIE ports. This dimensional expansion enables data to flow across multiple paths and chip combinations simultaneously, achieving both high-speed transmission on individual paths and high aggregate throughput across the multi-chip system
2Adaptability or versatility
If multiple chips are interconnected through a central processor, then data transmission among multiple chips is enabled, but CPU resource utilization increases
Solution Approach 1:
The patent enables chips to perform self-service data transmission by equipping each chip with multiple PCIE physical layer ports that can directly communicate with other chips. This eliminates the need for CPU-mediated data forwarding, allowing chips to autonomously exchange data through direct peer-to-peer connections, thereby achieving multi-chip adaptability while minimizing CPU resource consumption
Solution Approach 2:
The patent introduces PCIE physical layer ports as intermediary communication channels between chips, replacing the CPU as the mediating component. These ports provide dedicated high-speed transmission paths that bypass CPU involvement in data forwarding operations, enabling versatile multi-chip communication while reducing the energy burden on CPU resources
Data Source
AI summary
A data transmission method, includes: receiving a data packet to be transmitted, the data packet to be transmitted including data to be transmitted and chip identification information; determining a target first peripheral component interconnect express (PCIE) physical layer port corresponding to the chip identification information from a plurality of first PCIE physical layer ports, the plurality of first PCIE physical layer ports and a plurality of chips being interconnected one to one; distributing the data packet to be transmitted to the target first PCIE physical layer port; and transmitting the data packet to be transmitted to a receiving chip through the target first PCIE physical layer port, the receiving chip being a chip interconnected with the target first PCIE physical layer port.