PCI Express Reference Clock Gating for Stable Image Processor Startup
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Solution Overview
Problem
Conventional image processing apparatuses using PCI Express standards face failures when the voltage output from the power source to the interface is lower than the predetermined operating-voltage, leading to receiver device malfunctions.
Innovation Solution
An image processing apparatus that includes a control unit and an engine unit connected via a PCI Express interface, where the control unit determines if the voltage is within the operating-voltage range and only starts transmitting a reference clock to the engine unit once this condition is met, preventing failures by ensuring the voltage is stable before clock transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the receiver device starts operating before voltage stabilizes, then the device can begin processing faster, but the device may go out of order due to unstable voltage
Solution Approach 1:
The patent applies preliminary action by checking the voltage stability condition before the receiver device starts processing data. The control unit determines whether the voltage from the power source has stabilized to an acceptable level prior to enabling the receiver to operate, preventing operational failures while maintaining efficient startup sequence
Solution Approach 2:
The patent implements feedback by continuously monitoring the voltage output from the power source and using this information to control when the receiver device should start operating. The control unit receives voltage status information and adjusts the startup timing accordingly, creating a closed-loop control system that ensures reliable operation
Data Source
AI summary
An engine unit and a control unit are connected via an interface. A power source supplies electric power to the interface. The engine unit is controlled based on a reference clock generated in the control unit and transmitted to the engine unit via the interface. Only when a voltage output from the power source to the interface is in the operating-voltage range, the clock generator sends the reference clock to the engine unit via the interface.