PCIE Compliance Board Segmentation for Signal Testing
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Solution Overview
Problem
Current methods fail to provide a cost-effective solution for testing the compliance of data signals in PCIE expansion systems, which is essential for ensuring proper operation, as they cannot efficiently verify that data signals transmitted through multiple data lanes meet PCIE requirements.
Innovation Solution
A method and system involving compliance boards that loop back a portion of data signals and transmit another portion to a testing device, allowing for separate testing of even and odd data lane signals, thereby simplifying the design and reducing the surface area of each compliance board by grouping data signals into smaller sets for testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all data signals from multiple data lanes are transmitted through a single compliance board for testing, then complete compliance testing can be achieved, but the complexity and surface area of the compliance board increase significantly
Solution Approach 1:
The patent divides the compliance board into multiple separate boards, with each board responsible for testing a specific subset of data lanes. This segmentation reduces the complexity and surface area of each individual compliance board while maintaining complete coverage of all data signals through multiple boards working in conjunction.
2Reliability
If all data signals from multiple data lanes are transmitted through a single compliance board for testing, then complete compliance testing can be achieved, but the surface area of the compliance board increases
Solution Approach 1:
The patent divides the compliance board into multiple separate boards, with each board responsible for testing a specific subset of data lanes. This segmentation reduces the complexity and surface area of each individual compliance board while maintaining complete coverage of all data signals through multiple boards working in conjunction.
3Reliability
If current testing methods are used for PCIE expansion systems, then testing can be performed, but the cost-effectiveness is insufficient
Solution Approach 1:
The patent divides the compliance board into multiple separate boards, with each board responsible for testing a specific subset of data lanes. This segmentation reduces the complexity and surface area of each individual compliance board while maintaining complete coverage of all data signals through multiple boards working in conjunction.
Solution Approach 2:
Instead of requiring a single comprehensive compliance board that handles all data lanes simultaneously, the patent employs multiple compliance boards that each handle partial subsets of data lanes. This partial action approach reduces the scale and cost of individual boards while achieving complete testing coverage through systematic coverage of all lanes across multiple boards.
Data Source
AI summary
The present application describes a method and system for testing the compliance of a PCIE expansion system to verify that data signals transmitted through multiple data lanes in the expansion system comply with the PCIE requirements. The method for testing a PCIE expansion system comprises delivering the data signals from the data lanes to a compliance board that is configured to loop back at least a first portion of the data signals and transmit a complementary second portion of the data signals to a testing device, and testing a compliance of the second portion of the data signals with the PCIE requirements. The first portion of the data signals is then tested through a second compliance board that is configured to loop back the second portion of the data signals and transmit the first portion of the data signals to the testing device.