PCIe/CXL.IO Bandwidth Scaling Through Ordered and Unordered IO

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Solution Overview

Problem

The rapid scaling of PCIe/CXL I/O speeds from 64 GT/s to 128 GT/s and beyond poses challenges in delivering bandwidth with PCIe ordering constraints, as traditional methods require high hardware complexity and cost, especially for applications like AI and networking, where aggregate bandwidth through multiple paths is needed while preserving ordering at every intermediate point.

Innovation Solution

Implementing a bandwidth scaling system that allows independent advertisement of maximum bandwidth supported by receivers for unordered IO (UIO) and ordered IO (non-UIO) virtual channels, with negotiation protocols and flit packing rules to manage data transmission efficiently, ensuring flexible and cost-effective scaling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If PCIe ordering constraints are enforced for high bandwidth transmission, then data integrity is maintained, but hardware complexity and cost increase significantly

Engineering Contradiction:
Improvedata integrityVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments PCIe virtual channels into two distinct types: Ordered IO (OIO) and Unordered IO (UIO). This segmentation allows different handling mechanisms for different traffic types, enabling high bandwidth UIO transmission without the full overhead of ordering constraints, while still maintaining data integrity where needed through selective ordering.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different quality characteristics to different portions of the data stream by allowing receivers to independently advertise and negotiate bandwidth capabilities for OIO and UIO virtual channels separately. This enables local optimization where UIO channels can operate with relaxed ordering constraints for higher efficiency, while OIO channels maintain strict ordering for applications requiring data integrity.

Inventive Principle:
Principle #3Local quality

2Productivity

If single stream bandwidth is increased to meet AI and networking demands, then bandwidth capacity improves, but cost and hardware complexity increase

Engineering Contradiction:
Improvebandwidth capacityVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent transitions from a single-dimension bandwidth approach to a two-dimension approach by introducing separate bandwidth negotiation and scaling for OIO and UIO virtual channels. This allows aggregate bandwidth to be increased through multiple parallel UIO channels without proportionally increasing the complexity of ordering enforcement hardware, as UIO channels can be aggregated more efficiently.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If aggregate bandwidth through multiple paths is used, then bandwidth scalability improves, but preserving ordering at intermediate points becomes challenging

Engineering Contradiction:
Improvebandwidth scalabilityVSAvoidordering preservation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the I/O architecture into OIO and UIO paths, allowing aggregate bandwidth scaling through multiple UIO paths without requiring complex ordering preservation at intermediate points. UIO paths can be aggregated efficiently for high scalability, while OIO paths maintain ordering where needed through dedicated handling.

Inventive Principle:
Principle #1Segmentation

4Adaptability or versatility

If independent bandwidth scaling for UIO and non-UIO virtual channels is implemented, then flexibility and die area efficiency improve, but negotiation protocol complexity increases

Engineering Contradiction:
Improveconfiguration flexibilityVSAvoidnegotiation protocol complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extends the existing PCIe bandwidth negotiation mechanism to support independent UIO and non-UIO virtual channel bandwidth advertising. This universal extension allows the same negotiation infrastructure to handle both traditional OIO and new UIO channels, achieving configuration flexibility without requiring entirely separate negotiation protocols.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250274399A1Bandwidth scaling knobs for pcie/CXL.IO using unordered IO as primary vehicle
Publication Date: 2025.08.28 INTEL CORP
  • US20250274399A1 patent drawing
  • US20250274399A1 patent drawing
  • US20250274399A1 patent drawing

AI summary

This disclosure describes systems, methods, and devices related to bandwidth scaling. A device may receive data indicative of a negotiated data rate between a host and the device. The device may determine a throttle mode based on advertised bandwidth capabilities of the device, including support for non-unordered input output (non-UIO) virtual channels. The device may encode non-UIO virtual channel data within a Flit based on the throttle mode. The device may transmit the Flit based on the negotiated data rate.