PCIe Dedicated Interfaces for Real-Time Traffic Isolation

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Solution Overview

Problem

In PCIe systems, real-time traffic often experiences high latency and jitter due to mixing with non-real-time traffic, leading to head of line blocking and resource competition at shared interfaces.

Innovation Solution

Implementing dedicated interfaces on both the transmit and receive sides of the PCIe system, each coupled to specific virtual channels, ensures that real-time traffic is isolated from non-real-time traffic, using separate paths and memory resources to maintain low latency and controlled jitter.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multiple virtual channels share common interfaces, then device complexity is reduced, but latency and jitter increase due to head of line blocking

Engineering Contradiction:
Improveinterface structureVSAvoidlatency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent segments the PCIe interface into multiple dedicated interfaces, each associated with a specific virtual channel. This segmentation allows independent data paths for different virtual channels, eliminating head of line blocking and reducing latency while maintaining manageable device complexity through modular interface design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a crossbar switch as an intermediary component that manages traffic between multiple virtual channels and memory resources. The crossbar provides controlled access to shared resources while maintaining separate virtual channel paths, reducing latency without requiring complete interface duplication.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If real-time traffic shares interfaces with non-real-time traffic, then device complexity is reduced, but jitter increases due to resource competition

Engineering Contradiction:
Improveinterface structureVSAvoidjitter
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The patent segments traffic into separate dedicated interfaces for real-time and non-real-time data, eliminating resource competition and stabilizing timing performance. Each virtual channel has its own dedicated interface, ensuring consistent access patterns and reducing jitter for real-time traffic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by providing different interface characteristics to different virtual channels based on their traffic requirements. Real-time traffic receives dedicated interfaces with optimized timing characteristics, while non-real-time traffic uses shared interfaces, allowing each stream to have the quality appropriate to its needs.

Inventive Principle:
Principle #3Local quality

3Loss of time

If dedicated interfaces are provided for each virtual channel, then latency is reduced, but device complexity increases

Engineering Contradiction:
ImprovelatencyVSAvoidinterface structure
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent uses a crossbar switch as an intermediary to manage the complexity of multiple dedicated interfaces. The crossbar provides a centralized switching fabric that handles traffic routing between virtual channels and memory, reducing the complexity burden on individual interfaces while maintaining low latency through dedicated paths.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent makes the crossbar switch a universal component that serves multiple functions: traffic arbitration, routing, and resource management for all virtual channels. This multi-functionality reduces overall system complexity by consolidating management functions in a single component while maintaining dedicated interfaces for performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Device complexity

If multiple virtual channels use shared memory resources, then device complexity is reduced, but head of line blocking occurs

Engineering Contradiction:
Improvememory access structureVSAvoidhead of line blocking
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments memory access paths by providing dedicated interfaces for each virtual channel, which then access shared memory resources through a crossbar switch. This segmentation prevents head of line blocking by ensuring that each virtual channel has its own independent access path to the memory subsystem.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The crossbar switch acts as an intermediary between dedicated virtual channel interfaces and shared memory resources. It manages access to shared memory in a way that prevents head of line blocking by providing controlled, prioritized access based on virtual channel requirements while maintaining the benefits of shared memory resources.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250139035A1Transmit and receive circuits with multiple interfaces
Publication Date: 2025.05.01 TEXAS INSTRUMENTS INC
  • US20250139035A1 patent drawing
  • US20250139035A1 patent drawing
  • US20250139035A1 patent drawing

AI summary

A method includes transmitting first data with a first priority through a first dedicated interface on a transmit side of a PCIe system. The method also includes transmitting second data with a second priority through a second dedicated interface on the transmit side of the PCIe system. The method includes transmitting the first data and the second data to a receive side of the PCIe system using two or more virtual channels over a PCIe link, where the first data uses a first virtual channel and the second data uses a second virtual channel.