PCIe Gen5 Error Rate Measuring Apparatus Waveform Emphasis Optimization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-speed signal transmission in newly standardized PCIe Gen5 environments faces challenges in achieving an error-free state due to inadequate waveform emphasis optimization from the device under test, making manual emphasis adjustment difficult without internal setting information, and thus requiring link training for optimization.

Innovation Solution

An error rate measuring apparatus and method that transmit a test signal with varying parameter values defined by the PCI Express standard, measure bit errors, and identify the parameter value resulting in the least errors to optimize and control the emphasis of the output waveform of the device under test during link training, enabling bit error measurement and reception performance evaluation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If manual emphasis adjustment is performed on the device under test, then waveform optimization can be achieved, but the operation becomes extremely difficult due to lack of internal setting information

Engineering Contradiction:
Improvewaveform optimizationVSAvoidemphasis adjustment
Core Design Contradiction:
Manufacturing precisionVSEase of operation

Solution Approach 1:

The device under test performs self-adjustment of emphasis settings by automatically transitioning through link training states (L0, L1, L2, L3) and selecting optimal emphasis values based on received signals, eliminating the need for manual intervention and internal setting access

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The device under test pre-configures multiple emphasis settings in advance during manufacturing and stores them as lookup tables, allowing automatic selection during operation without requiring real-time manual adjustment

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If link training is performed to adjust emphasis, then optimal waveform can be obtained, but the process time increases due to multiple state transitions

Engineering Contradiction:
Improvewaveform optimizationVSAvoidadjustment time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

Multiple emphasis settings are pre-configured and stored in the device under test during manufacturing, allowing instant selection during link training without requiring time-consuming real-time adjustment procedures

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The device under test automatically monitors bit error rates during link training and uses this feedback to select the optimal pre-configured emphasis setting, reducing the number of iterations needed to achieve optimization

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11579192B2Error rate measuring apparatus and error rate measuring method
Publication Date: 2023.02.14 ANRITSU CORP
  • US11579192B2 patent drawing
  • US11579192B2 patent drawing
  • US11579192B2 patent drawing

AI summary

An error rate measuring apparatus includes a data transmission unit that transmits a test signal of a known pattern and a parameter value defined by a communication standard to a device under test, and a bit error measurement unit that measures a bit error of a signal transmitted from the device under test. The data transmission unit sequentially changes the parameter value and transmits the parameter value to the device under test. The bit error measurement unit measures a bit error of a signal transmitted from the device under test corresponding to the parameter value. The error rate measuring apparatus further includes a discrimination unit that discriminates a parameter value at which the number of bit errors is the least in a measurement result of the bit error measurement unit, as an optimum value of emphasis of an output waveform of the device under test.