PCI Express Ethernet Bridge for CPU Peripheral Sharing

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Solution Overview

Problem

Existing systems for connecting multiple CPUs to a network to share peripheral devices require a large number of bridges, leading to an increased circuit scale, which is inefficient and costly.

Innovation Solution

A network bridge apparatus that includes a PCI Express adapter and a network adapter, which encapsulates Transaction Layer Packets (TLPs) in Ethernet frames, allowing multiple CPUs to share peripheral devices with a reduced number of bridges by using Ethernet or other layer 2 switches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a large number of bridges are used to connect multiple CPUs to a network to share peripheral devices, then the system can support multiple CPUs sharing devices, but the circuit scale increases significantly

Engineering Contradiction:
ImproveCPU sharing capabilityVSAvoidcircuit scale
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the PCI Express switch function with Ethernet switch function into a single integrated device. The PCI Express switch incorporates Ethernet port(s) directly, eliminating the need for separate Ethernet switches and reducing the overall number of bridges required in the system. This integration allows multiple CPUs to share peripheral devices through a reduced number of bridges while maintaining full sharing capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The PCI Express switch is designed to perform multiple functions: it serves as both a PCI Express switch for internal device connections and an Ethernet switch for network connections. This multi-functionality reduces the total number of separate switching devices needed, thereby reducing circuit scale while supporting multiple CPU sharing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If a large number of bridges are used to connect CPUs and peripheral devices, then device sharing is enabled, but the cost increases

Engineering Contradiction:
Improvedevice sharing capabilityVSAvoidcost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

By combining multiple bridge functions into fewer integrated devices, the overall system cost is reduced. The integrated PCI Express-Ethernet switch eliminates the need for multiple separate bridges, reducing component count, assembly complexity, and overall system cost while maintaining device sharing functionality.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If conventional PCI Express switch is used, then high-speed communication is achieved, but the circuit scale is large when connecting multiple CPUs

Engineering Contradiction:
Improvecommunication speedVSAvoidcircuit scale
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent integrates Ethernet switching capability directly into the PCI Express switch, allowing high-speed communication between multiple CPUs and peripheral devices through a reduced number of bridges. This integration maintains the high-speed communication benefits of PCI Express while reducing the circuit scale by eliminating the need for separate Ethernet switches.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8412875B2Switch and network bridge apparatus
Publication Date: 2013.04.02 NEC CORP
  • US8412875B2 patent drawing
  • US8412875B2 patent drawing
  • US8412875B2 patent drawing

AI summary

A network system that is part of a main system includes: a first PCI express-network bridge with a first control unit and a first PCI express adapter terminating a first PCI express bus; and a second PCI express-network bridge connected to the first PCI express-network bridge through a network. The second PCI express-network bridge includes a second control unit and a second PCI express adapter terminating a second PCI express bus, wherein the first control unit detects a destination of a packet sent from the first PCI express adapter, searches a physical address of the destination from a packet encapsulating table, and encapsulates the packet in a frame so that the frame includes the physical address, and wherein the second control unit removes the encapsulation tagged to the packet, and transfers the packet to the destination through the second PCI express bus by referring to a PCI express configuration register.