Expanded Addressing in PCIe Communication Fabric
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Solution Overview
Problem
Computer systems face physical limitations in density and scalability due to constraints in networked storage and remote computing systems, particularly in terms of device capacity, redundancy, and reliability, especially in high-density environments like cloud and enterprise settings.
Innovation Solution
The implementation of a PCIe communication fabric that uses expanded addressing to route PCIe traffic beyond the limitations of traditional port fields, allowing for a greater number of devices per host by utilizing additional bits in the PCIe traffic to identify routing information and manage data transfers across a communication fabric.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional PCIe port field addressing is used, then the system maintains simplicity in addressing mechanism, but the number of devices per host is limited
Solution Approach 1:
The patent extends the traditional PCIe address space by utilizing unused or spare bits in the existing PCIe traffic structure. Instead of adding new address fields that would increase complexity, the invention repurposes existing bits (such as reserved bits or bits from other fields) to create an expanded address space, effectively adding a dimension to the addressing capability without proportionally increasing structural complexity
Solution Approach 2:
The invention changes the interpretation and utilization parameters of existing PCIe traffic fields. By reassigning or expanding the bit-width of certain fields (such as using more bits from the function number field or utilizing reserved bits), the system achieves a larger addressable device space while maintaining compatibility with the existing PCIe protocol structure
2Quantity of substance
If the number of devices per host is increased to meet storage and computing needs, then device capacity and redundancy are improved, but physical space requirements and environmental control needs increase
Solution Approach 1:
The patent enables a single PCIe host to universally address and control a larger number of devices through the expanded address space. This multi-functionality allows one host interface to manage multiple storage devices, computing devices, or a combination thereof, increasing device capacity without requiring additional host interfaces or proportionally increasing physical space
Solution Approach 2:
The expanded addressing scheme allows the system to segment and organize a larger number of devices under a single host, enabling logical grouping and management of devices that would otherwise require multiple hosts or controllers, thereby reducing the overall physical footprint and environmental control requirements
Data Source
AI summary
Computing architectures, platforms, and systems are provided herein. In one example, a system is provided. The system includes a communication arrangement for peripheral component interconnect express (PCIe) traffic transferred over a communication fabric. The communication arrangement establishes an expanded address that provides a quantity of port identifiers to a host greater than indicated by a quantity of bits in a port field of the PCIe traffic, where the expanded address employs one or more bits of the PCIe traffic other than the port field. The communication arrangement detects a transfer among the PCIe traffic issued by the host having the expanded address corresponding to a destination. Based on the expanded address, the communication arrangement identifies routing information to route the transfer over the communication fabric to the destination.