PCIe Failover Mechanism for Primary Secondary Processor Redundancy
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Solution Overview
Problem
In shared IO architectures, failover between primary and secondary processors in PCIe networks is hindered by the need for the secondary processor to reenumerate PCIe devices, leading to service interruptions and potential network breakdowns due to delayed access requests during primary processor failures.
Innovation Solution
A failover method where a secondary device stores topology information and a loaded driver for PCIe devices, allowing it to continue processing transactions by receiving transaction processing packets with processing information, enabling fast failover without reenumerating devices and ensuring uninterrupted host services.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the secondary mCPU performs failover processing by re-enumerating PCIe devices, then the failover process can be completed with full device state verification, but the host service is interrupted during the failover period
Solution Approach 1:
The patent applies preliminary action by having the secondary mCPU pre-load device drivers and pre-enumerate PCIe devices before failover occurs. This preparation work is done in advance while the primary mCPU is still operational, so that when failover is triggered, the secondary mCPU can immediately take over without needing to perform time-consuming re-enumeration, thus reducing service interruption time while ensuring complete device state verification
2Stability of the object's composition
If the primary mCPU breaks down and failover to the secondary mCPU is delayed, then the system can maintain stability during the failure period, but the access request of the host cannot be processed in time leading to access timeout and host breakdown
Solution Approach 1:
The patent implements preliminary action by pre-configuring the secondary mCPU with all necessary device drivers and topology information before failover. This ensures that when the primary mCPU fails, the secondary mCPU can immediately process access requests without delay, preventing host timeout and breakdown while maintaining system stability through the pre-established configuration
3Loss of time
If the secondary mCPU stores topology information and drivers in advance, then fast failover can be achieved without re-enumeration, but the device complexity of the system increases
Solution Approach 1:
The patent applies merging by combining the topology information and device drivers into a unified pre-configured data structure that is stored in the secondary mCPU's memory. This integrated approach allows the secondary mCPU to access all necessary information from a single centralized location, reducing failover time while managing system complexity through organized data consolidation rather than scattered configurations
4Reliability
If the secondary device continues processing transactions using stored topology information and drivers, then service interruption is prevented, but the accuracy of device state synchronization must be maintained
Solution Approach 1:
The patent implements feedback mechanisms where the secondary mCPU continuously monitors and synchronizes its device state with the primary mCPU's state through status packets and configuration space reads. This feedback loop ensures that the pre-loaded topology information and drivers remain synchronized with the actual device state, maintaining accuracy while enabling continuous service processing
Data Source
AI summary
A failover method, apparatus and system to implement fast failover between a primary processor and a secondary processor, where the method includes receiving, by a first device, transaction content of a transaction and transaction status data of the transaction, the transaction status data being used to resume the transaction when the transaction is interrupted by a failure of a second device, and continuing to process, by the first device, the transaction according to the transaction content and the transaction status data when detecting that the second device fails.