PCIe ID-Based Stream Bypass Logic for Latency Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The conventional PCI Express (PCIe) ordering rules cause performance bottlenecks due to interference between request streams, particularly when non-posted requests are blocked behind posted requests, leading to latency issues.
Innovation Solution
Implementing ID-based streams over PCIe by introducing an ID-based ordering flag and memory ordering logic that allows bypassing queued requests, enabling independent request streams to bypass stalled posted requests and improving queue management through a layered protocol stack.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PCIe ordering rules are implemented to ensure read operations get the most recent data, then data consistency is maintained, but request streams interfere with each other causing performance bottlenecks
Solution Approach 1:
The patent segments the request stream into multiple independent streams identified by stream identifiers. Each stream can be processed independently through the switch, allowing parallel handling of different request types. This segmentation eliminates the interference between posted and non-posted requests while maintaining data consistency within each stream.
Solution Approach 2:
The patent introduces dynamic stream identification and ordering mechanisms that adaptively manage request streams based on their type and priority. The switch dynamically routes different streams through different paths or queues, allowing flexible control over request processing order without rigid adherence to conventional ordering rules, thus improving overall system throughput.
2Stability of the object's composition
If non-posted requests are blocked behind posted requests to maintain ordering, then ordering requirements are met, but latency increases for latency-sensitive read requests
Solution Approach 1:
The patent applies preliminary ordering within each stream at the source device before requests are sent to the switch. By pre-ordering requests within their respective streams according to their type (posted or non-posted), the switch can process streams in parallel without needing to maintain strict global ordering, thus reducing latency for non-posted requests while preserving necessary order within each stream.
Solution Approach 2:
The patent introduces stream identifiers as an intermediary mechanism that allows the switch to differentiate between various request streams and apply appropriate ordering rules to each. This intermediary enables the switch to maintain ordering where necessary while allowing out-of-order processing across different streams, reducing overall latency.
Data Source
AI summary
A method and apparatus for enabling ID based streams over Peripheral Component Interconnect Express (PCIe) is herein described. In this regard an apparatus is introduced including a memory ordering logic to order packets to be transmitted over a serial point-to-point interconnect, the memory ordering logic to bypass a stalled first packet with a second packet that arrived after the first packet if the second packet includes an attribute flag set to indicate that the second packet is order independent and if the second packet includes an ID that is different from an ID associated with the first packet. Other embodiments are also described and claimed.