PCIe Inter-Domain Resource Allocation via Management Processor
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Solution Overview
Problem
Existing PCIe network technologies are inadequate for managing resource allocation across multiple domains, leading to inefficiencies in data transfer and resource utilization as they primarily focus on single-domain resource sharing.
Innovation Solution
A management processor is introduced to collect resource information from multiple PCIe domains, allocate resources across domains, and program non-transparent bridges (NTBs) for cross-domain resource access, enabling efficient inter-domain resource utilization by translating memory and request IDs for accurate data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single-domain resource sharing approach is used, then device complexity is reduced, but resource utilization efficiency deteriorates when multiple PCIe domains need to share resources
Solution Approach 1:
A management processor is introduced as an intermediary component to handle inter-domain resource allocation. The management processor collects resource information from multiple PCIe domains, processes resource requests, and coordinates resource allocation across domains, thereby improving resource utilization efficiency without requiring each domain to directly manage resources from other domains.
Solution Approach 2:
The system is segmented into distinct functional components: link processors in each PCIe domain that report resource status, a central management processor that handles allocation decisions, and NTB devices that facilitate cross-domain communication. This segmentation allows each component to have specialized functions, improving overall system efficiency while maintaining manageable complexity through clear separation of concerns.
2Loss of information
If inter-domain resource allocation is implemented without a management processor, then device complexity is minimized, but information accuracy about available resources across domains deteriorates
Solution Approach 1:
Link processors in each PCIe domain continuously report resource status information to the management processor. This feedback mechanism ensures the management processor maintains accurate and up-to-date information about available resources across all domains, enabling informed allocation decisions while keeping individual domain link processors relatively simple.
Solution Approach 2:
The management processor serves multiple functions: collecting resource information from all domains, processing resource requests, making allocation decisions, and programming NTBs for cross-domain access. This universal component consolidates complex management tasks, improving information accuracy without distributing complexity across multiple components.
3Productivity
If cross-domain resource access is enabled without NTB programming, then ease of operation is improved, but data transfer efficiency deteriorates due to lack of address translation
Solution Approach 1:
The management processor performs preliminary actions by pre-programming the NTB devices with appropriate address translation information before cross-domain resource access is needed. This preliminary configuration of NTBs ensures that when resource access requests occur, data transfer can proceed efficiently with proper address translation already in place, without requiring complex runtime address resolution.
Data Source
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AI summary
Embodiments of the present invention provide a solution for managing inter-domain resource allocation in a Peripheral Component Interconnect-Express (PCIe) network. One processor among a plurality of link processors is elected as a management processor. The management processor obtains information about available resources of PCIe network. When a resource request from a request processor is received, the management processor allocates a resource of the available resources to the requesting processor. The management processor instructs one or more link processors to program one or more inter-domain NTBs through which the traffic between the allocated resource and the requesting processor is going to flow according to the memory address information of the allocated resource, to allow cross-domain resource access between the requesting processor and the allocated resource.