PCIe Lane Allocation for Efficient Link Setup After Lane Failures
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Solution Overview
Problem
Existing PCIe devices face inefficiencies in link setup due to failed lanes, leading to suboptimal performance and resource wastage when non-sequential lane numbers are not allocated to adjacent lanes.
Innovation Solution
A PCIe device with a link controller that allocates non-sequential lane numbers to adjacent lanes, allowing for efficient link setup and utilization of all available lanes, even in the presence of failed lanes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sequential lane numbers are allocated to lanes in traditional PCIe devices, then the link setup process is simple and straightforward, but link utilization is suboptimal and resource wastage occurs when lanes fail
Solution Approach 1:
The lane number allocation is made dynamic rather than fixed. The link controller dynamically determines the allocation strategy based on lane status (successful or failed) and adjusts the lane number assignment accordingly. When lanes are successful, sequential numbers are used; when lanes fail, non-sequential numbers are allocated to optimize utilization, making the system adaptable to varying conditions
Solution Approach 2:
The patent changes the parameter of lane number allocation from a fixed sequential pattern to a variable non-sequential pattern. By modifying the allocation parameters based on lane success status, the system can optimize link utilization. The link controller adjusts which lanes receive which numbers based on real-time performance data
2Productivity
If non-sequential lane numbers are allocated to adjacent lanes, then link utilization is optimized and resource wastage is minimized, but the link setup process becomes more complex
Solution Approach 1:
The link controller performs self-service by automatically detecting lane status and autonomously determining the optimal allocation strategy without external intervention. The controller monitors which lanes are successful and automatically adjusts the numbering scheme, eliminating the need for manual configuration or complex external coordination
Solution Approach 2:
The system incorporates feedback mechanisms where the link controller receives status information about lane performance and uses this feedback to adjust the lane number allocation strategy. This closed-loop approach allows the system to learn from lane success/failure and adapt the allocation accordingly, optimizing utilization while managing complexity through automated decision-making
3Productivity
If all lanes are utilized regardless of failure status, then resource wastage is minimized, but link stability and reliability are compromised
Solution Approach 1:
The system segments the lane utilization based on success status. Successful lanes are allocated sequential numbers and included in the active link, while failed lanes are excluded and assigned non-sequential numbers. This segmentation ensures that only reliable lanes are actively used for data transmission, maintaining link stability while maximizing resource utilization among functional lanes
Data Source
AI summary
A Peripheral Component Interconnect express (PCIe) device includes: a plurality of ports forming a plurality of lanes; and a link controller configured to set a link including the plurality of lanes to allocate non-sequential lane numbers to lanes adjacent to each other among the plurality of lanes.