PCIe Lane Redundancy and Failover for Multi-Lane IO Interconnections
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Solution Overview
Problem
In PCIE bus systems, the physical cabling between CPU and IO expansion chassis is prone to failures due to cable loss or accidental removal, disrupting data connections and requiring mechanisms for failover to maintain system reliability.
Innovation Solution
Implementing a failover mechanism that uses lane multiplexers and switches to reroute data between PCIE bridges and IO devices, allowing for seamless switching between active and redundant cable sets in case of failures, utilizing PCIe 'lane downshift' to reduce active lanes and reroute data through unused lanes in other cables.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If physical cabling is used to connect CPU and IO expansion chassis, then data transmission can be achieved, but the connection is prone to failures due to cable loss or accidental removal
Solution Approach 1:
The patent establishes redundant cable paths and lane assignments before any failure occurs. Multiple cables are pre-configured with specific lane assignments, and the system maintains readiness to switch to backup paths without requiring any action when a failure happens. This preliminary preparation ensures that when a cable is lost or accidentally removed, the system can immediately failover to an alternative path.
Solution Approach 2:
The patent implements redundancy by having backup cable paths and lane assignments ready in advance. This cushioning against potential failures means that when a cable failure occurs, the system already has protected alternative routes available, preventing complete connection loss and maintaining system operation through pre-positioned failover capabilities.
2Reliability
If redundant cable paths are implemented for failover, then system reliability improves, but device complexity increases
Solution Approach 1:
The patent divides the PCIe connection into separate cable paths with distinct lane assignments. By segmenting the connection into multiple independent cables (e.g., Cable 1 with Lanes 0-3, Cable 2 with Lanes 4-7), the system can isolate failures to individual segments and switch between them. This segmentation manages complexity by organizing redundancy into structured, manageable units rather than a monolithic complex system.
Solution Approach 2:
The PCIe switch acts as an intermediary that manages the complexity of redundant cable paths. It receives data from multiple cables and routes it appropriately, handling the switching logic and lane management centrally. This intermediary component abstracts the complexity of multiple cables and failover logic from the end devices, providing a simplified interface while maintaining reliable redundant connections.
Data Source
AI summary
Method and apparatus for providing failover operation for a connection between a first PCIE bridge and a first input/output (IO) device are provided. A first set of bussed bits is exchanged between the first PCIE bridge and the first IO device over a first link using a first set of lanes of the first PCIE bridge. In response to detecting a failure in the first link, at a PCIE bridge end, the first set of lanes is swapped with a second set of lanes of the first PCIE bridge for exchanging a second set of bussed bits between the first PCIE bridge and the first IO device over a second link using the second set of lanes, the second link connecting a second PCIE bridge with a second IO device. In response to detecting the failure in the first link, at an IO device end, the first set of lanes is switched with the second set of lanes for exchanging the second set of bussed bits between the first PCIE bridge and the first IO device over the second link using the second set of lanes.