Dual-Port PCIe Lane Sharing Under Power and Area Limits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Multiport systems with NVMe devices face inefficiencies due to excess lanes leading to wasted area, money, and bandwidth when configurations change, as they either underutilize or inefficiently switch between port configurations.
Innovation Solution
Implement a dynamic lane allocation system where each port has two permanent lanes and two shared lanes, switching between low power and full operational states to match bandwidth and power limitations, using a controller to manage lane connections and deceive MACs into believing they have four lanes while only using six total lanes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the device has eight lanes total with four lanes at each port, then each port can operate at full bandwidth, but area and power consumption increase
Solution Approach 1:
The patent merges the lane resources of two ports by implementing shared lanes that can be dynamically allocated between ports. Instead of providing dedicated four lanes to each port (totaling eight lanes), the system combines lane resources so that six physical lanes serve both ports, reducing area while maintaining full bandwidth capability when needed.
Solution Approach 2:
The patent implements dynamic lane allocation where the lane configuration can change based on operational requirements. The system can switch between different lane distributions (e.g., 4 lanes to port A and 2 to port B, or vice versa, or 3-3 split) allowing full bandwidth utilization for active ports while keeping the physical lane count at six to reduce area.
2Productivity
If the device has one four lane port and one six lane port, then bandwidth is optimized, but link reconnection is required when configuration changes
Solution Approach 1:
The patent implements dynamic lane allocation where the lane configuration can change based on operational requirements. The system can switch between different lane distributions (e.g., 4 lanes to port A and 2 to port B, or vice versa, or 3-3 split) allowing full bandwidth utilization for active ports while keeping the physical lane count at six to reduce area.
Solution Approach 2:
The shared lanes are pre-configured and can be rapidly switched between ports without requiring link reconnection. The system maintains readiness to allocate lanes to either port, allowing configuration changes to occur seamlessly without the time penalty of dropping and re-establishing links.
3Loss of energy
If six lanes are activated out of eight available lanes, then power and area are reduced, but bandwidth is wasted due to underutilization
Solution Approach 1:
The patent implements dynamic lane allocation where the lane configuration can change based on operational requirements. The system can switch between different lane distributions (e.g., 4 lanes to port A and 2 to port B, or vice versa, or 3-3 split) allowing full bandwidth utilization for active ports while keeping the physical lane count at six to reduce area.
Solution Approach 2:
The six physical lanes serve multiple functions by being shared between two ports. The same physical lane resources can be allocated to different ports depending on demand, allowing the system to achieve full bandwidth utilization for the active configuration while maintaining reduced power consumption and area compared to having dedicated eight lanes.
Data Source
AI summary
Rather than having more lanes than the bus can support, the number of lanes can match the number of lanes the bus can support. For a six lane, two port system that means each port will have two permanent lanes and two lanes that are shared with the other port. When changing configurations from four lanes on the first port to four lanes on the second port, the shared lanes are placed in low power stage from the perspective of the first port and moved into full operational stage for the second port. Thus, each port believes there are four lanes for the port for a total of eight lanes for the device. However, in reality there are only six total lanes for the device, thus saving costs and matching bandwidth and power limitations of the device.