PCIe Link Equalization Control for Gen3-to-Gen4 BER Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing electronic devices face challenges in maintaining low bit error rates (BER) and ensuring communication quality, particularly in transitioning between different PCIe generations (Gen3 and Gen4) due to variations in transmission paths and output waveforms.
Innovation Solution
The electronic device employs a control mechanism that adjusts transmission settings through a first control circuit and a second control circuit, exchanging adjustment values to optimize the output waveform of connected devices, using a TxEQ value table to determine optimal settings for equalizers, ensuring BER is maintained below 10−12 across different communication speeds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the communication speed is increased from Gen3 to Gen4, then the data transmission rate is improved, but the bit error rate increases and communication quality deteriorates
Solution Approach 1:
The patent adjusts transmission parameters including TxEQ values and equalizer settings when transitioning between PCIe Gen3 and Gen4 to optimize signal quality at each speed, thereby maintaining low bit error rates while achieving higher communication speeds
Solution Approach 2:
The system dynamically adapts transmission settings based on the operating generation (Gen3 or Gen4), automatically selecting appropriate TxEQ values and equalizer configurations to maintain communication quality across different speed regimes
2Adaptability or versatility
If different transmission paths are used for Gen3 and Gen4, then compatibility with respective specifications is improved, but the complexity of managing multiple transmission paths increases
Solution Approach 1:
The control circuit is designed to universally handle both Gen3 and Gen4 transmissions by selecting appropriate TxEQ values and equalizer settings based on the operating generation, eliminating the need for separate dedicated paths while maintaining specification compliance
3Reliability
If TxEQ values are adjusted for each port independently, then communication quality at each port is optimized, but the time required for adjustment and training increases
Solution Approach 1:
The system performs link training and TxEQ value determination in advance during the initialization phase, storing the determined values for rapid deployment when transitioning between generations, thereby minimizing adjustment time while maintaining communication quality
Data Source
AI summary
An electronic device includes a first control circuit and a second control circuit. The first control circuit can acquire, when a first reception circuit and a first transmission circuit transition from a first state of communicating at a first communication speed conforming to a first specification to a second state of communicating at a second communication speed conforming to a second specification, a first adjustment value related to one setting value applied to a third transmission circuit, and transmit the first adjustment value to the second control circuit. The second control circuit can determine, when a second reception circuit and a second transmission circuit transition from the first state to the second state, a second adjustment value which is one setting value applied to a fourth transmission circuit, based on the first adjustment value transmitted from the first control circuit.