PCIe Switch Link Monitoring for Dynamic Fabric Routing

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Solution Overview

Problem

The PCIe specification's rigid hierarchical tree structure complicates the design of large-scale systems with multiple PCIe switches and hosts, limiting the efficient sharing of system resources and decreasing efficiency due to the inability to share links between hosts.

Innovation Solution

Implementing a link monitor within a PCIe-compliant switch to monitor fabric links and apply a shortest path algorithm for dynamic routing pathfinding, allowing for efficient updating of routing paths and handling of broken links, load balancing, and adapting to changes in fabric topology.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a rigid hierarchical tree structure is used for PCIe topology, then the system follows the PCIe specification standard, but the design complexity increases and link sharing between hosts becomes impossible

Engineering Contradiction:
ImprovePCIe specification complianceVSAvoidsystem design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic routing capabilities within PCIe switches that allow the system to adaptively select different paths through the fabric based on current topology and link availability, transforming the static hierarchical tree into a dynamic mesh-like structure that maintains PCIe compliance while enabling flexible resource sharing

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent enables PCIe fabric links to serve multiple hosts simultaneously through virtualization and routing functions, allowing a single physical link to be shared across multiple PCIe domains and hosts, thereby increasing resource utilization and reducing overall system complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If dedicated links are assigned to each host in a PCIe tree structure, then link reliability is ensured, but the number of required links increases and system efficiency decreases

Engineering Contradiction:
Improvelink reliabilityVSAvoidsystem efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges multiple dedicated host links into a shared PCIe fabric infrastructure, where multiple hosts can access system resources through a common switching fabric rather than requiring separate dedicated links to each resource, thereby improving efficiency while maintaining reliability through redundant paths

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the routing parameters and path selection criteria dynamically based on fabric link availability and topology changes, allowing the system to optimize resource allocation and improve efficiency by selecting the most appropriate paths through the shared fabric

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If static routing paths are used in PCIe fabric, then implementation simplicity is maintained, but the ability to adapt to link failures and topology changes is reduced

Engineering Contradiction:
Improveimplementation simplicityVSAvoidtopology adaptability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent implements feedback mechanisms where PCIe switches monitor fabric link status and topology changes in real-time, and automatically adjust routing paths based on this feedback, enabling dynamic adaptation to link failures and topology changes while maintaining relatively simple implementation through standardized routing algorithms

Inventive Principle:
Principle #23Feedback

4Ease of operation

If the main CPU handles fabric link monitoring and routing updates, then centralized control is achieved, but the CPU burden increases and response time to link changes decreases

Engineering Contradiction:
Improvecentralized controlVSAvoidresponse time to link changes
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent segments the fabric link monitoring and routing update functions from the main CPU and implements them in dedicated PCIe switch hardware or firmware, allowing these time-critical functions to operate independently and respond immediately to link changes without burdening the main CPU

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces PCIe switches as intermediary devices that handle fabric link monitoring and routing decisions locally, acting as mediators between the physical fabric links and the hosts, thereby enabling fast local response to topology changes while maintaining centralized configuration capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12562998B2Link monitor for a switch having a PCIE-compliant interface, and related systems, devices, and methods
Publication Date: 2026.02.24 MICROCHIP TECHNOLOGY INC
  • US12562998B2 patent drawing
  • US12562998B2 patent drawing
  • US12562998B2 patent drawing

AI summary

Some embodiments relate to a link monitor for a switch having a PCIe-compliant interface. Some embodiments relate to an apparatus including a Peripheral Component Interconnect Express (PCIe)-compliant interface provided at a PCIe domain of a switch. The apparatus may also include a link monitor provided at a switching fabric of the switch that supports the PCIe domain of the switch. The link monitor to observe a factor-changing event of a state of a fabric link and obtain a value at least partially responsive to a weight computation, the weight computation for a factor associated with the factor-changing event. Related devices, systems and methods are also disclosed.