PCIe Link Reconfiguration for Power Reduction
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Solution Overview
Problem
Conventional PCIe communication protocols are power-inefficient and complex, making them unsuitable for mobile devices, and existing link management schemes are cumbersome due to multiple form factor requirements, leading to inefficiencies in power consumption and system performance.
Innovation Solution
A low-power interconnect technology that combines a conventional PCIe protocol stack with a low-power physical unit, such as M-PHY, to enable efficient power management and simplified link training, while maintaining performance by leveraging legacy components and optimizing link management mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional PCIe communication protocol is used, then high communication speed is achieved, but power consumption increases
Solution Approach 1:
The patent implements dynamic link reconfiguration that allows the link operating mode to be changed during run-time based on system requirements. The link can transition between different modes (e.g., x16, x8, x4, x2, x1) and operational states, enabling the system to optimize power consumption by selecting lower-bandwidth modes when full performance is not required, while maintaining high-speed capability when needed.
Solution Approach 2:
The patent changes the parameter of link bandwidth dynamically by reconfiguring the number of active lanes and link width. By adjusting these parameters during operation, the system can reduce power consumption by operating at lower bandwidth settings during idle or low-demand periods, and scale up to full bandwidth when performance is required.
2Speed
If PCIe protocol is optimized for maximum performance, then communication speed is improved, but complexity of link management increases
Solution Approach 1:
The patent implements a self-service mechanism where the link management system automatically performs reconfiguration without requiring complex external intervention. The system includes automated detection of form factor requirements, automatic selection of appropriate link modes, and self-managed transitions between operational states, thereby reducing the complexity burden on external controllers.
Solution Approach 2:
The patent creates a universal link management approach that handles multiple form factor requirements through a single integrated system. The same link manager handles different connector types, system incorporations, and form factors by automatically adapting to the specific requirements, eliminating the need for separate management mechanisms for each form factor.
3Adaptability or versatility
If link management supports multiple form factors, then adaptability is improved, but transition time between states increases
Solution Approach 1:
The patent implements preliminary action by pre-configuring and caching link management parameters and state information for different form factors. When a form factor change is detected, the system can quickly transition by retrieving pre-prepared configuration data rather than performing lengthy negotiation and setup procedures, thereby reducing state transition time while maintaining support for multiple form factors.
Data Source
AI summary
In one embodiment, a device having a link training state machine including a reconfiguration logic to perform a dynamic link reconfiguration of a physical link coupled between the device and a second device during a run-time in which the physical link does not enter a link down state, including transmission of a plurality of bandwidth change requests to the second device, each of the plurality of bandwidth change requests to request a bandwidth change from a first bandwidth to a second bandwidth. Other embodiments are described and claimed.