PCI-E Link Selection Controller for Multi-Host Data Consistency

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Solution Overview

Problem

Multi-host support in data storage systems using PCI-E devices can lead to data consistency issues due to shared memory addresses being accessed via different PCI-E links, causing inconsistencies during contemporaneous write operations.

Innovation Solution

Mapping individual shared memory addresses to specific PCI-E links and using link selection controllers to identify the correct link for each address in response to process calls, ensuring all transfers for a given address space use the same data path, and implementing failover mechanisms to maintain data consistency and availability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multi-host PCI-E devices are used to enable multiple hosts to access shared memory simultaneously, then system versatility and productivity are improved, but data consistency and reliability deteriorate due to potential race conditions from different PCI-E links

Engineering Contradiction:
Improvesystem throughputVSAvoiddata consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The shared memory address space is segmented and mapped to specific PCI-E links, creating distinct access paths for different memory regions. This segmentation prevents simultaneous access conflicts by ensuring that different hosts access different memory segments through dedicated links, thereby maintaining data consistency while preserving multi-host productivity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A link selection controller is introduced as an intermediary component between the multi-host PCI-E device and the shared memory. This controller mediates the access requests by selecting the appropriate PCI-E link based on the memory address, acting as a traffic manager that directs requests to maintain data consistency while enabling concurrent access

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If shared memory addresses are accessed via multiple PCI-E links to improve load distribution, then system performance is improved, but data integrity deteriorates due to potential inconsistencies in contemporaneous write operations

Engineering Contradiction:
Improvesystem performanceVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Different portions of the shared memory are assigned different access characteristics - specific memory regions are mapped to specific PCI-E links, creating local quality differences in access paths. This ensures that contemporaneous write operations to the same address occur through the same link, maintaining data integrity while allowing load distribution across different memory regions

Inventive Principle:
Principle #3Local quality

3Reliability

If a link selection controller is introduced to map addresses to specific PCI-E links, then data consistency is improved, but device complexity increases

Engineering Contradiction:
Improvedata consistencyVSAvoidcontroller complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The link selection controller is designed with multi-functionality, handling address mapping, link selection, and failover detection within a single component. This universal approach consolidates complexity into one controller rather than requiring separate mechanisms for each function, thereby maintaining data consistency while limiting the increase in overall device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12045184B2System for monitoring and controlling host selection for a multi-host capable PCI-E device
Publication Date: 2024.07.23 DELL PROD LP
  • US12045184B2 patent drawing
  • US12045184B2 patent drawing
  • US12045184B2 patent drawing

AI summary

A storage system that includes multiple CPU hosts and PCI-E multi-host capable devices uses link selection controllers to map shared memory addresses to individual PCI-E links such that each address is accessed via only one of a plurality of PCI-E links. The addresses may be grouped into same-size segments, each of which contains only addresses mapped to the same PCI-E link. The link selection controllers monitor for state changes that affect PCI-E link availability and, in response to detection of a failure, coordinate a response that includes re-mapping the affected addresses.