PCIe Link Training Module Handling Unintended Link Downs
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Solution Overview
Problem
Existing PCIe interface devices face challenges in processing commands when an unintended link down occurs, leading to potential blue screen errors and interruptions in host operations due to the inability to differentiate between intended and unintended link downs.
Innovation Solution
A PCIe interface device with a transaction layer, data link layer, physical layer, and link training module that generates transaction packets, link packets, and physical packets, and performs link negotiation, while maintaining data information based on whether a link down is requested by the host, and includes a PCIe register to store data information across these layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the PCIe interface device treats all link downs as unintended events, then false blue screen errors occur during intentional link downs, but if it treats all link downs as intentional, then blue screen errors occur during unintended link downs
Solution Approach 1:
The system performs preliminary action by setting the L0s entry disable bit in the ASPM control register before entering the L0s low power state. This preliminary configuration prevents unintended link downs from occurring in the first place, allowing the system to distinguish between intentional (host-requested) and unintended (error-induced) link downs based on whether this bit was previously set.
Solution Approach 2:
The system uses feedback by monitoring the link down event and checking the ASPM control register state to determine the nature of the link down. Based on this feedback, the system selectively generates blue screen errors only for unintended link downs, avoiding false positives while maintaining system reliability.
2Reliability
If the device flushes all commands during link down, then data transmission is interrupted for intentional link downs, but if it maintains commands, then data corruption occurs during unintended link downs
Solution Approach 1:
The system performs preliminary action by setting the L0s entry disable bit before entering low power state, which serves as a marker for intentional link downs. This allows the system to later determine whether to flush commands or maintain them based on the link down's intentionality, ensuring data integrity without unnecessary interruptions.
Solution Approach 2:
The system dynamically adjusts command handling based on the detected link down type. For unintended link downs, commands are flushed to prevent corruption, while for intentional link downs, commands are maintained to preserve processing continuity. This dynamic response optimizes both reliability and productivity.
Data Source
AI summary
A Peripheral Component Interconnect Express (PCIe) interface device includes a transaction layer generating a transaction packet for transmission of a transaction, a data link layer generating a link packet including a protection code and a sequence number for the transaction packet and a link packet including a sequence number on the basis of the transaction packet, a physical layer generating a physical packet on the basis of the link packet and sequentially outputting the physical packet, a link training module performing negotiation for a link coupled through the physical layer and maintaining data information based on whether a link down occurring when the negotiation for the link is not performed is requested by a host or not, and a PCIe register storing information about the transaction layer, the data link layer, the physical layer, and the link training module.


