PCIe Controller Link Width Optimization via Dual Port Ordering
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Solution Overview
Problem
PCIe devices often fail to establish a link during initialization due to failed lanes, leading to suboptimal link width and reduced data transmission capabilities.
Innovation Solution
A PCIe capable semiconductor device with a link training and status state machine (LTSSM) that performs first and second lane number negotiations according to different orderings of ports to determine an optimized link width, ensuring maximum link width even if one or more lanes fail.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single lane number negotiation is performed according to a fixed ordering of ports, then the initialization process is simple and fast, but the link width may be suboptimal if some lanes fail
Solution Approach 1:
The patent applies preliminary action by performing a first lane number negotiation before a second lane number negotiation. The LTSSM executes the first negotiation according to a first ordering of ports, and if the resulting link width is not optimal (i.e., not all lanes are successfully set), it performs a second negotiation according to a second ordering of ports. This preliminary sequence of negotiations ensures that the system attempts to maximize link width while maintaining a structured initialization process.
Solution Approach 2:
The patent applies dynamics by making the lane number negotiation process adaptive rather than static. The LTSSM dynamically determines whether to perform a second lane number negotiation based on the results of the first negotiation. If the first negotiation does not achieve optimal link width (indicated by failed lanes), the system dynamically transitions to performing a second negotiation with a different port ordering, allowing the initialization process to adapt to actual lane availability.
2Productivity
If multiple lane number negotiations are performed to maximize link width, then the link width optimization improves, but the initialization time increases
Solution Approach 1:
The patent performs the first lane number negotiation as a preliminary step that establishes an initial link width. This first negotiation provides a baseline configuration that allows the system to quickly initialize with a functional link width, reducing the perceived initialization time. The second negotiation is only performed if necessary, preventing unnecessary time delays.
Solution Approach 2:
The LTSSM dynamically controls the execution of multiple lane number negotiations based on actual lane establishment results. The system transitions from the first negotiation to the second negotiation only when the first negotiation fails to achieve optimal link width. This dynamic conditional execution minimizes initialization time by avoiding redundant negotiations while ensuring link width optimization when needed.
3Productivity
If the LTSSM performs lane number negotiation according to different orderings of ports, then the ability to maximize link width improves, but the complexity of the negotiation process increases
Solution Approach 1:
The patent applies segmentation by dividing the lane number negotiation process into distinct first and second negotiations, each with its own port ordering. The first negotiation uses a first ordering of ports (e.g., ascending order), while the second negotiation uses a second ordering of ports (e.g., descending order or a different sequence). This segmentation allows the complex task of maximizing link width under uncertain lane availability to be broken into manageable, ordered steps that the LTSSM can execute systematically.
Solution Approach 2:
The LTSSM implements dynamic port ordering by selecting different port orderings for the first and second lane number negotiations. The system can switch between different port ordering strategies based on the results of the first negotiation. This dynamic reordering capability enables the system to adapt to various failure scenarios while maintaining a structured negotiation process that does not require complex real-time decision-making about individual lane states.
Data Source
AI summary
A PCIe capable semiconductor device includes; ports respectively configured to transmit and receive data in a PCIe environment, and a PCIe controller configured to set a link between the PCIe capable semiconductor device and another PCIe capable semiconductor device. The link includes at least one lane implemented over at least one of the ports. The PCIe controller includes a link training and status state machine (LTSSM) configured to perform a first lane number negotiation according to a first ordering of the ports and a second lane number negotiation according to a second ordering of the ports different from the first ordering of the ports, and determine an optimized link width for the link according to the results of the first lane number negotiation and the second lane number negotiation.