PCIe NOP DLLP Event Signaling for Trigger-Based Debugging

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Solution Overview

Problem

Existing PCIe-based storage devices lack effective mechanisms to detect and manage trigger points of events during data communication, which hinders efficient debugging and maintenance.

Innovation Solution

A PCIe interface device that generates and transmits No Operation (NOP) data link layer packets (DLLPs) containing event information, allowing external devices to perform dump operations and monitor communication environments for accurate debugging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If existing PCIe-based storage devices use conventional data communication without event trigger detection mechanisms, then the device structure remains simple, but effective debugging and maintenance become difficult

Engineering Contradiction:
Improvedebugging efficiencyVSAvoiddevice structure
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary mechanism using NOP DLLP packets as mediators between the PCIe device and external debugging systems. These packets carry event information and trigger signals without disrupting normal data communication, enabling debugging functionality while maintaining device operational simplicity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements feedback mechanisms where the device monitors its own operational state and sends feedback signals through NOP DLLP packets to external devices. This enables real-time event detection and trigger-based debugging, improving ease of operation while adding controlled complexity through standardized feedback protocols

Inventive Principle:
Principle #23Feedback

2Measurement precision

If PCIe devices transmit data continuously without event-triggered mechanisms, then data communication is simple, but precise detection of event trigger points becomes difficult

Engineering Contradiction:
Improveevent trigger detection precisionVSAvoidcommunication mechanism
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the data communication mechanism into two independent parts: normal data transmission and event trigger signaling. By separating these functions and using NOP DLLP packets specifically for event triggers, the system achieves precise event detection without complicating the overall communication mechanism

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses distinct packet types (NOP DLLP with specific event information fields) as visual identifiers analogous to color changes. This allows external devices to easily distinguish and detect event trigger points in the data stream, improving measurement precision while maintaining clear communication protocols

Inventive Principle:
Principle #32Color changes

3Loss of information

If no dump operation mechanism is implemented, then the system remains simple, but storing information about data and packets during specific time periods becomes impossible

Engineering Contradiction:
Improveinformation retentionVSAvoidinformation management system
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by having external devices ready to perform dump operations upon receiving trigger signals. The system pre-configures the capability to store information during specific time periods without adding complex real-time decision logic, thus retaining information while managing system complexity through pre-established protocols

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260072788A1Peripheral component interconnect express interface device and system including the same
Publication Date: 2026.03.12 SK HYNIX INC
  • US20260072788A1 patent drawing
  • US20260072788A1 patent drawing
  • US20260072788A1 patent drawing

AI summary

Provided herein is a PCIe interface device. The PCIe interface device may include a NOP DLLP generator configured to generate a No Operation (NOP) data link layer packet (DLLP) including event information representing an event in response to the occurrence of the event and a transmitter configured to transmit the NOP DLLP to an external device through a link including a plurality of lanes.