PCIe NVDIMM Controller Power Failure Data Protection
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Solution Overview
Problem
NVRAM storage systems face data loss due to battery backup failures in DRAM, as data written to NVRAM but not yet saved to disk is lost during power outages, and the use of heavy and unreliable DRAM batteries for backup is inefficient.
Innovation Solution
A PCIe-compliant memory system controller with power detection logic and NVDIMM sockets manages data transfers via DMA and initiates save operations to flash memory upon power failures, using ultra capacitors for power backup and accommodating NVDIMM cards from different vendors, ensuring data durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If DRAM with battery backup is used for NVRAM, then data can be preserved during power failure, but the battery becomes heavy and unreliable
Solution Approach 1:
The patent changes the energy storage parameter from battery-based to capacitor-based power supply. The ultra-capacitor provides sufficient energy to complete the save operation during power failure without the weight and reliability issues of batteries, resolving the contradiction between data durability and weight.
Solution Approach 2:
The patent uses ultra-capacitors with finite discharge durations (e.g., 10-30 seconds) that are sufficient for completing save operations. These capacitors can be replaced more easily and are lighter than batteries, maintaining data durability while reducing weight and improving reliability.
2Reliability
If DRAM with battery backup is used for NVRAM, then data can be preserved during power failure, but the battery becomes unreliable and needs replacement
Solution Approach 1:
The patent employs ultra-capacitors with limited discharge durations that are sufficient for save operations. These capacitors are more reliable and easier to replace than batteries, eliminating the need for complex battery replacement procedures while maintaining data protection capabilities.
3Productivity
If data is written to NVRAM before disk, then write speed is improved, but data loss occurs if power fails before disk write
Solution Approach 1:
The patent implements preliminary action by using ultra-capacitors to provide power specifically during power failure events to complete the save operation from NVRAM to disk. This ensures that data written to NVRAM for speed is subsequently protected, resolving the contradiction between write speed and data durability.
Solution Approach 2:
The ultra-capacitor acts as a cushioning energy source that activates beforehand to protect against power failure. It provides sufficient energy to complete the save operation, cushioning the system against data loss while maintaining the performance benefit of NVRAM caching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively protects transient write data by saving it to flash memory during power outages, ensuring data integrity and eliminating the need for unreliable DRAM batteries, while accommodating various NVDIMM vendors for compatibility.
Implementation Method 1
uses ultra capacitors for power backup
Data Source
AI summary
A memory system controller includes one or more sockets for accommodating NVDIMM cards produced by different NVDIMM providers; a PCIe interface for coupling the memory system controller to a host; and a controller coupled to the PCIe interface over a PCIe-compliant connection and to the one or more sockets over respective DDR2 connections. The controller is configured to manage data transfers between the host and a specified one of the NVDIMM sockets in which an NVDIMM card is accommodated as DMA reads and writes, format data received from the PCIe interface for transmission to the specified NVDIMM socket over the corresponding one or more DDR2 interfaces, and initiate save and restore operations on the NVDIMM card accommodated within the specified NVDIMM socket in response to power failure and power restoration indications.


