PCIe Port Mode Controller Dynamic Switching
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Solution Overview
Problem
Existing PCIe devices lack efficient methods to dynamically switch between dual port and single port modes, affecting data communication flexibility and error handling in PCIe-based storage systems.
Innovation Solution
A PCIe device with a port mode controller that can change the operating mode from dual port to single port or vice versa, by controlling link training, lane reduction, and lane increase operations, allowing independent operation of ports and maintaining data communication integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the PCIe device operates in dual port mode with both ports independently, then data communication flexibility is improved, but device complexity increases
Solution Approach 1:
The PCIe device implements dynamic mode switching capability that allows transition between dual port mode and single port mode based on operational requirements. The port mode controller dynamically adjusts the operating mode in response to mode change requests from hosts, enabling the device to adapt its complexity level and communication flexibility as needed without being fixed in one configuration state
2Device complexity
If the PCIe device switches from dual port mode to single port mode, then device complexity is reduced, but data communication flexibility deteriorates
Solution Approach 1:
The device maintains dynamic reconfigurability by allowing mode changes in both directions. When switching to single port mode, the device can later be switched back to dual port mode upon receiving another mode change request, ensuring that communication flexibility is restored when needed while complexity is reduced during periods when it is not required
3Adaptability or versatility
If the PCIe device performs link training operation for the second link, then adaptability is improved, but loss of time increases
Solution Approach 1:
The device performs link training operations in advance when switching from single port mode to dual port mode, establishing the second link connection before it is needed for data communication. This preliminary action ensures that when dual port mode is activated, the links are already trained and ready, minimizing time loss during actual operational transitions
4Reliability
If the PCIe device resets the second link, then reliability is improved, but loss of time increases
Solution Approach 1:
The device dynamically manages link states by resetting the second link when transitioning to single port mode in dual port operation. This selective resetting ensures reliable operation by clearing potential errors in the inactive port while maintaining the active first link, balancing reliability improvement with minimal time loss since only the necessary link is reset
Data Source
AI summary
A method of operating a Peripheral Component Interconnect Express (PCIe) device including a first port and a second port comprises: performing a first link training operation to link up a first host with a first link of the first port; operating in a single port mode when the first link training operation is completed; performing a lane reduce operation to reduce a lane corresponding to the first link in response to a mode change request received from the first host; and performing a second link training operation to link up a second host with a second link of the second port when a status of the first link is an L0 state.