PCIe Power Management Register Security Against DOS Attacks
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Solution Overview
Problem
Denial of Service (DOS) attacks on computing devices, particularly those following the PCIe specification, are vulnerable due to the exposure of power management registers, allowing malicious software to illegitimately power down IP devices, leading to poor user experience, significant downtime, and data loss.
Innovation Solution
An additional secure path is introduced to determine the legitimacy of IP driver power management access requests, comprising a register, a filter driver, and decision logic. The Power Management Controller (PMC) of the System-on-Chip (SoC) includes a register that can only be modified in System Management Mode (SMM), and a filter driver generates a System Management Interrupt (SMI) message to unlock power down actions only for legitimate requests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If power management registers are exposed to allow software access for IP device power control, then ease of operation is improved, but system security deteriorates due to vulnerability to malicious DOS attacks
Solution Approach 1:
A new secure register is introduced as an intermediary between software and the power management capability status register (PMCSR). This intermediary register acts as a gatekeeper that controls whether software can modify the PMCSR, thereby preventing malicious access while allowing legitimate power management operations to proceed through the established interface.
Solution Approach 2:
The power management control functionality is segmented into two distinct components: a public interface (PMCSR) for legitimate power management operations and a secure register for authentication and access control. This segmentation allows the system to maintain ease of operation for authorized software while implementing security measures against unauthorized access.
2Reliability
If a secure path with register and filter driver is added to validate power management requests, then system security is improved, but device complexity increases
Solution Approach 1:
The secure register serves as a simple intermediary that requires minimal additional logic. It functions as a binary gate (locked/unlocked state) that software must properly configure before power management operations can proceed, adding security without requiring complex validation algorithms or multiple authentication layers.
Solution Approach 2:
The secure register is configured in advance (locked by default) before any power management operations occur. This preliminary security configuration ensures that even if software attempts malicious access, the protective mechanism is already in place, eliminating the need for runtime complexity in validating each power management request.
Data Source
AI summary
The disclosure generally relates method, system and apparatus to prevent denial of service (DOS) attacks on PCIe based computing devices. In an exemplary embodiment, an independent register is used in combination with a filter driver and additional logic to form an integrity check for power down instructions. An exemplary system includes a register circuitry corresponding to the IP device, the register circuitry having a designated storage bit to indicate an unlocked state of the register; a filter driver to receive a first power state transition request when the IP device is idle after a predetermined period, the power state transition request defining a timeout period; a controller to change the power state of the IP device to the unlock state; a decision logic to receive and authenticate a second power state transition request in response to validation of register circuitry being unlocked.