PCIe Storage QoS Management via Dynamic Transfer Mode Selection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current data handling systems, particularly those using PCIe storage, lack methods to combine or dynamically switch between DMA, DCA, and DDIO protocols for multiplexing, QoS control, and cache flow-control, limiting their ability to optimize data transfer modes for throughput or latency.
Innovation Solution
Implementing a QoS-aware IO management system with reconfigurable multi-ports that selects transfer modes (throughput-oriented, latency-sensitive, or balanced) based on data characteristics and available ports, using a data communication controller with a receiver interface, transfer mode selector, and block distribution unit to manage data transfer over PCIe storage systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single data transfer protocol (DMA, DCA, or DDIO) is used for all data access ports, then the system configuration is simple, but the system cannot optimize for both throughput and latency requirements simultaneously
Solution Approach 1:
The system dynamically selects transfer modes (DMA, DCA, DDIO) for each data access port based on real-time QoS requirements. The transfer mode selector component changes the operational state of each port individually, allowing the system to adapt to varying throughput and latency demands without redesigning the entire controller architecture.
Solution Approach 2:
The data communication controller is segmented into independent functional components: multiple data access ports, a transfer mode selector, and a block distribution unit. Each port can be independently configured with different transfer modes, allowing granular control over protocol selection without increasing overall system complexity.
2Speed
If data is always transferred to host system memory (DMA), then data availability is high, but cache utilization is low and latency performance suffers
Solution Approach 1:
The system changes the destination parameter for data transfers based on QoS requirements. For latency-sensitive applications, data is directed to CPU caches (DDIO mode) for faster access. For throughput-oriented applications, data is directed to host system memory (DMA mode) ensuring high availability. The transfer mode selector dynamically adjusts this parameter.
Solution Approach 2:
CPU caches serve as an intermediary between host system memory and IO devices. The DDIO protocol utilizes this intermediary to provide fast data access for latency-sensitive applications, while the DMA protocol bypasses the intermediary for high-throughput scenarios. The block distribution unit directs data flows through appropriate paths.
3Productivity
If multiple data access ports are configured with different transfer modes, then QoS control is improved, but the complexity of managing and switching between modes increases
Solution Approach 1:
The transfer mode selector component provides multi-functionality by supporting all three transfer modes (DMA, DCA, DDIO) within a single unified component. Each data access port can be independently configured with any of these modes, allowing the system to achieve high productivity through diverse protocol support without requiring separate control logic for each mode.
Solution Approach 2:
The block distribution unit automatically directs data blocks to appropriate destinations based on the configured transfer modes of available ports. This self-service mechanism eliminates the need for complex external management logic, as the controller autonomously manages mode switching and port allocation based on pre-configured parameters.
4Reliability
If data is prefetched to CPU caches (DCA), then cache utilization is improved, but memory bandwidth is consumed and throughput may be reduced
Solution Approach 1:
The system dynamically selects between DCA and DMA modes based on real-time bandwidth availability and cache utilization metrics. When cache capacity is available and latency is critical, DCA prefetching is activated. When memory bandwidth is abundant and throughput is prioritized, direct DMA transfers are used, preserving bandwidth for other operations.
Data Source
AI summary
Embodiments of methods and systems for quality of service (QoS)-aware input/output (IO) management for a Peripheral Component Interconnect Express (PCIe) storage system with reconfigurable multi-ports are described. In an embodiment, a method includes receiving, in a receiver interface, an IO request from a software application, the IO request comprising information for communicating data over a data access port. The method may also include determining, in a transfer mode selector, a transfer mode selection for communicating the data over the data access port, the transfer mode being selected from a throughput-oriented mode, a latency-sensitive mode, or a balanced mode. Additionally, the method may include communicating, by a block distribution unit, the data over the data access port in response to the IO request, and according to the data transfer mode.