PCIe Shared Memory Architecture for Automotive HPC Communication
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Solution Overview
Problem
Existing automotive bus systems like CAN/CAN-FD, LIN, and FlexRay are inadequate for high-bandwidth communication between high-performance computing platforms due to limited bandwidth and static configuration, while Ethernet-based solutions require heavy-weight implementations and are not suited for all use cases.
Innovation Solution
A modular/layered software architecture using PCIe switches for high-bandwidth interconnects, enabling shared memory communication between heterogeneous computing platforms through a shared memory application programming interface, abstracting PCIe-specific details and supporting DMA and PIO mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If automotive bus systems (CAN/CAN-FD, LIN, FlexRay) are used for communication between computing platforms, then system complexity is reduced and ease of operation is maintained, but bandwidth is limited and adaptability is poor
Solution Approach 1:
The patent introduces a PCIe switch as an intermediary device that enables high-bandwidth communication between computing platforms. The PCIe switch acts as a mediator that handles the complex address translation and routing operations, allowing computing platforms to communicate at high speeds without each platform needing to implement complex communication logic. This resolves the contradiction by providing high adaptability through PCIe's capability while managing complexity centrally in the switch device.
Solution Approach 2:
The PCIe interface provides universal communication capability that can handle various data types and communication patterns (point-to-point, multicast, shared memory) through a single standardized interface. This multi-functional approach allows the system to achieve high bandwidth adaptability while maintaining relatively simple system architecture, as PCIe can accommodate different communication requirements without requiring multiple specialized bus systems.
2Adaptability or versatility
If Ethernet is used for backbone communication between high-performance computing platforms, then bandwidth is improved and adaptability is enhanced, but processing load increases and device complexity increases
Solution Approach 1:
The patent extracts the communication protocol complexity from the computing platforms and places it in the PCIe switch. By taking out the Ethernet-like protocol handling from the application layer and implementing it in the PCIe switch hardware, the system achieves Ethernet-like flexibility and bandwidth while reducing the processing load on computing platforms. The switch handles address translation, routing, and protocol management, leaving the computing platforms with simpler communication tasks.
3Ease of operation
If PCIe is implemented without abstraction layers, then communication speed is improved, but ease of operation deteriorates and adaptability to heterogeneous platforms is reduced
Solution Approach 1:
The patent segments the PCIe communication system into multiple abstraction layers: a hardware layer for high-speed data transfer, a driver layer for device management, and an application layer for simplified programming. This segmentation allows each layer to optimize for its specific function - the hardware layer maintains high communication efficiency while the upper layers provide ease of operation and portability across heterogeneous platforms through standardized interfaces.
Solution Approach 2:
The patent introduces software abstraction layers as intermediaries between the application software and the PCIe hardware. These intermediary layers handle the complexity of PCIe configuration, address translation, and data management, allowing applications to use simple standardized interfaces while maintaining high communication efficiency through optimized hardware paths. The intermediaries translate high-level operations into low-level PCIe commands without sacrificing performance.
Data Source
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AI summary
The invention is related to a system (S) for a high-bandwidth interconnect (PCIe), especially a Peripheral-Component-Interconnect-Express-Communication, in a vehicle, the vehicle has an in-vehicle central computing platform (100) as part of a vehicle (101) comprising a plurality of computing platforms (HPC), optionally high performance computing platform and/or integration computing platform, for different functional applications (APP) using a shared memory interface (SHM-API), especially a shared memory application programming interface, the system (S) comprising: - a modular software architecture (SA) with different abstraction layers (L1, L2, L3), especially being applicable to heterogeneous vehicle equipment with variable computing platforms (HPC) and/or different functional applications (APP), - a first abstraction layer (L1) for the high-bandwidth interconnect (PCIe) for an operation system (OS) of microprocessors (uP) of the computing platform (HPC), - a second abstraction layer (L2) for managing the high-bandwidth interconnection (PCIe), - a third abstraction layer (L3) for the shared memory interface (SHM-API) for the different functional applications (APP), especially to gain access to the shared memory, preferably provided by the plurality of computing platforms (HPC).