PCIe SKP OS Control Logic for Clock Frequency Compensation

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Solution Overview

Problem

Current PCIe interface systems face challenges in efficiently managing data transmission and error recovery due to clock frequency differences between devices, leading to performance deterioration and data loss.

Innovation Solution

The implementation of a skip ordered set (SKP OS) control logic that adjusts the transmission interval of the SKP OS based on the transmission history and the state of the elastic buffer, allowing for real-time compensation of clock frequency differences and preventing overflow or underflow errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the transmission interval of SKP OS is fixed, then the device complexity is reduced, but the reliability deteriorates due to clock frequency differences causing overflow or underflow errors

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidSKP OS control logic complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the receiving device monitors the fill level of its buffer and sends control signals back to the transmitting device. When the buffer is nearly full, the receiver requests more SKP OS; when nearly empty, it requests fewer SKP OS. This closed-loop feedback system dynamically adjusts SKP OS transmission to prevent overflow and underflow, significantly improving data transmission reliability without requiring overly complex local prediction logic at the transmitter.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The receiving device autonomously manages its own buffer by monitoring its fill level and independently generating requests for SKP OS transmission. This self-service approach allows the receiver to adapt to clock frequency differences and buffer conditions without external intervention, ensuring reliable operation while keeping the overall system complexity distributed rather than centralized.

Inventive Principle:
Principle #25Self-service

2Reliability

If the SKP OS transmission interval is increased to compensate for clock frequency differences, then the reliability improves, but the productivity decreases due to reduced data transmission efficiency

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoiddata transmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent transforms the SKP OS transmission interval from a fixed value to a dynamic parameter that adapts to real-time buffer conditions. The transmitting device adjusts the SKP OS transmission frequency based on feedback from the receiver's buffer status, transmitting more frequently when the buffer is full and less frequently when empty. This dynamic adjustment ensures reliable data transmission by preventing overflow and underflow while maximizing productivity by avoiding unnecessary SKP OS transmissions that would reduce data throughput.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the transmission interval parameter of SKP OS based on buffer fill level. When the buffer is nearly full, the transmission interval is shortened to prevent overflow; when the buffer has sufficient space, the interval is extended to improve data transmission efficiency. This parameter adaptation allows the system to maintain reliability across varying conditions while optimizing productivity for each specific state.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the SKP OS transmission interval is decreased to prevent buffer overflow, then the reliability improves, but the loss of time increases due to more frequent interruptions in data transmission

Engineering Contradiction:
Improvebuffer overflow preventionVSAvoidtransmission time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The feedback mechanism allows the system to transmit SKP OS only when the receiver's buffer is nearly full, rather than using a fixed frequent interval. This on-demand approach prevents buffer overflow (improving reliability) while minimizing transmission interruptions (reducing time loss), as SKP OS are sent only when actually needed to maintain buffer health.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

Instead of continuously transmitting SKP OS at a fixed frequent interval (excessive action), the system transmits SKP OS partially and selectively based on actual buffer conditions. This partial action approach prevents overflow by transmitting SKP OS only when the buffer reaches a critical level, thereby maintaining reliability while avoiding unnecessary transmissions that would waste time and reduce overall data transmission efficiency.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11782792B2PCIe interface and interface system
Publication Date: 2023.10.10 SK HYNIX INC
  • US11782792B2 patent drawing
  • US11782792B2 patent drawing
  • US11782792B2 patent drawing

AI summary

A device is provided to include: a transceiver configured to transmit and receive data; and a skip ordered set (SKP OS) control logic in communication with the transceiver and configured to generate an SKP OS and control the transceiver to transmit the SKP OS and a data block to a link connecting to an external device and including a plurality of lanes. The SKP OS control logic is configured to increase or decrease transmission interval of the SKP OS based on a transmission history of the SKP OS, in response to an entry of the link to a recovery state that is used to recover the link from an error.