PCIe Slimline Connector ID Signal Detection and Protection

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Solution Overview

Problem

Traditional server systems fail to automatically identify and configure different slimline connectors connected to various PCIe devices, leading to potential incorrect connections and damage risks due to mismatched channel widths.

Innovation Solution

The implementation of a method using identification signals (ID signals) transmitted through resistors to a Complex Programming Logic Device (CPLD), which detects correct connections before powering on the server, preventing short circuits and automatically configuring PCIe channel widths based on device types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional server system design is used without automatic identification, then device complexity is reduced, but connection reliability deteriorates due to potential incorrect connections and short circuits

Engineering Contradiction:
Improveconnection reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by implementing ID signal transmission through resistors to the CPLD before the server powers on. The CPLD detects correct connections in advance, preventing short circuits and damage before they can occur. This early detection mechanism ensures reliable connections are established before any harmful effects can manifest.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses an intermediary approach by introducing a CPLD as a mediator between the slimline connectors and the PCIe devices. The CPLD receives ID signals from connectors through resistors, processes the connection information, and automatically configures PCIe channel widths, thereby preventing incorrect connections without requiring complex manual configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If automatic identification using ID signals and CPLD is implemented, then connection reliability improves, but device complexity increases

Engineering Contradiction:
Improveconnection reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service by enabling the system to automatically identify and configure connections without external intervention. The ID signals transmitted through resistors allow the CPLD to autonomously detect connector positions, determine correct connections, and automatically configure PCIe channel widths, eliminating the need for manual configuration and reducing operational complexity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent applies parameter changes by dynamically adjusting PCIe channel widths based on detected device types and connector positions. The system modifies electrical parameters (channel configuration) automatically once connections are verified through ID signal detection, optimizing system performance while maintaining connection reliability.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If manual configuration of PCIe channels is used, then device complexity is minimized, but productivity deteriorates due to fixed positions and lack of automatic adaptation

Engineering Contradiction:
Improvesystem configuration efficiencyVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamics by transitioning from static, fixed PCIe channel configurations to dynamic, automatically adaptable configurations. The system continuously monitors connector positions through ID signals and automatically adjusts channel widths and device assignments based on detected conditions, enabling the server to adapt to different hardware configurations without manual reconfiguration.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11748293B2Method of automatic identification and protection of correct PCIe configuration of a server and server applying the method
Publication Date: 2023.09.05 FULIAN PRESION ELECTRONICS (TIANJIN) CO LTD
  • US11748293B2 patent drawing
  • US11748293B2 patent drawing
  • US11748293B2 patent drawing

AI summary

A method of automatic identification of PCIe configuration of a server and preventing operation if each slimline connector connected with a PCIe device is found connected to an incorrect slot of a mother board utilizes a combination of first and second signals of two null interfaces of the first connector as that ID signal and a combination of third and fourth signals of the two interfaces of a second connector as that ID signal. The CPLD receiving the ID signals detects whether the first and second slimline connectors are in their specified and correct slots. Powering on of computer is not permitted if incorrect connection is found, and a warning prompt is generated. A PCIe channel width for each slimline is automatically configured if no incorrect connection is found. A server applying the method is also disclosed.