PCIe SSD Accelerator Thermal Decoupling and Wear Tracking
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Solution Overview
Problem
Existing PCIe SSD products face challenges in maintaining thermal and power margins, and in tracking the wear history of flash memory devices, leading to potential loss of data and financial impacts when flash memory devices fail.
Innovation Solution
Partitioning the PCIe SSD into a PCIe card and a separate flash daughter-card, with the daughter-card housing NAND flash devices and an EEPROM for wear history tracking, and using a microcontroller for thermal and power management, including dynamic performance throttling and power conversion circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If flash memory devices are located on the PCIe SSD card, then data storage capacity is achieved, but thermal margins deteriorate due to heat generation
Solution Approach 1:
The PCIe SSD system is divided into two separate physical components: a PCIe card containing the controller and a separate flash daughter-card containing the flash memory devices. This segmentation allows the heat-generating flash memory to be physically separated from the PCIe card, improving thermal margins while maintaining full storage capacity.
2Quantity of substance
If wear history is stored only in flash memory devices, then storage space is utilized, but reliability deteriorates when flash memory devices fail
Solution Approach 1:
The wear history tracking function is extracted from the flash memory devices and implemented in a separate microcontroller on the PCIe card. This extraction ensures that wear history data remains preserved and accessible even when flash memory devices fail or are replaced, significantly improving reliability.
3Productivity
If PCIe SSD draws maximum power, then performance is maximized, but power margins deteriorate exceeding the 25 Watt limit
Solution Approach 1:
The system implements dynamic power management where the microcontroller continuously monitors power consumption and dynamically adjusts the operating performance of the flash memory devices and controller. This allows the PCIe SSD to operate at maximum performance when power margins allow, while automatically throttling performance to stay within the 25 Watt PCIe power limit when necessary, optimizing both productivity and power margin compliance.
Data Source
AI summary
A peripheral component interconnect express (PCIe) solid state drive (SSD) accelerator, having a PCIe card and separate a flash daughter-card, is provided. By including flash memory devices on a separate daughter-card, the flash memory devices are thermally decoupled from the hotter devices on the main PCIe providing additional thermal operating margins for the entire design. Furthermore, as flash memory devices are the most likely part of the subsystem to wear out over time due, including flash memory devices on a separate daughter-card allows the flash memory devices to become a field replaceable unit that can be easily replaced. EEPROMs may be included on the flash daughter-card to record the current wear state of the NAND flash devices. Knowing the wear history of the flash memory device allows the seller to replace the flash daughter-card of a customer with a daughter-card having a similar wear state.