PCIe Storage Device L1.2 Power Sub-State Entry

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current data storage devices on a PCIe network cannot transition to L1.1 or L1.2 power sub-states if not all devices on the network support these states, leading to increased idle power consumption as they remain in the L1 power state, which is not suitable for mobile devices and high-performance computing due to long recovery times.

Innovation Solution

A PCI FW register configures a CLKREQ de-assert signal to a MAC of the data storage device, independent of the host's power state, allowing the device to enter L1 sub-states like L1.2, with a sensor remaining active to detect a wake-up signal for transitioning to a higher power state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If all devices on a PCIe network support L1 power sub-states, then power consumption is reduced and recovery time is improved, but device compatibility and network-wide adoption are limited

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice compatibility
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The data storage device independently determines and transitions to L1 power sub-states without requiring host device support or coordination. The device autonomously manages its own power state transitions, enabling it to enter low-power states even when other devices on the network do not support them.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent separates the power management capability from the host device control, allowing individual devices to independently manage their own power states. This segmentation enables each device to operate in L1 sub-states autonomously rather than requiring network-wide coordination.

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If L2 and L3 power states are used, then power consumption is reduced, but recovery time to active state increases to milliseconds

Engineering Contradiction:
Improvepower consumptionVSAvoidrecovery time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent changes the power state parameters by introducing L1 sub-states (L1.1, L1.2) that offer intermediate power consumption levels between L0 and L2/L3. These sub-states provide lower power consumption closer to L2/L3 while maintaining faster recovery times closer to L0, achieving an optimal balance through parameter adjustment.

Inventive Principle:
Principle #35Parameter changes

3Loss of time

If L1 power state is used, then recovery time to active state is fast, but power consumption remains relatively large

Engineering Contradiction:
Improverecovery timeVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent introduces dynamic power sub-states (L1.1, L1.2) within the L1 power state hierarchy. These dynamic sub-states allow the device to adjust its power consumption and recovery characteristics based on operational needs, providing flexibility to optimize between power savings and recovery speed.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11543996B2Systems and methods for power management in a data storage device
Publication Date: 2023.01.03 SANDISK TECHNOLOGIES LLC
  • US11543996B2 patent drawing
  • US11543996B2 patent drawing
  • US11543996B2 patent drawing

AI summary

A method and apparatus for data storage devices, or other devices that are L1 sub-state capable, to enter these sub-states while on the same network or bus as a device not enabled for transition to an L1 power sub-state. According to certain embodiments, a PCI FW register is configured to place a CLKREQ de-assert signal to a MAC of the data storage device, independent of the power state of the host. The CLKREQ de-assert signal causes the MAC to place the data storage device in an L1 power substate such as L1.2. A sensor of the controller remains active to detect a wakeup signal from the host that causes the data storage device to transition to a higher power state.