PCIe Switch Expands Accelerator Card Capacity

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Solution Overview

Problem

Traditional servers with CPU as the sole computing power provider face limitations in processing capacity, especially with the exponential growth of data driven by technologies like cloud computing, big data, and AI, as they cannot accommodate a sufficient number of accelerator cards due to the limited number of PCIe slots, leading to inflexible resource deployment.

Innovation Solution

A system architecture that includes a data exchange unit and an accelerated processing unit, where the accelerated processing unit can be scheduled to meet varying processing needs, utilizing PCIe switches to connect multiple accelerator cards to a single PCIe slot, allowing for flexible deployment of computing resources and overcoming the limitations of traditional servers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple accelerator cards are connected to PCIe slots of CPU to improve computing power, then processing capacity is improved, but the limited number of PCIe slots restricts the quantity of accelerator cards that can be inserted

Engineering Contradiction:
Improveprocessing capacityVSAvoidnumber of accelerator cards
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

A PCIe switch is introduced as an intermediary device between the CPU and multiple accelerator cards. The switch expands the PCIe slot interface, allowing one physical slot to connect to multiple accelerator cards through the switch's multiple ports, thereby overcoming the limitation of fixed PCIe slot numbers on the CPU.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system transitions from a direct one-to-one connection model (CPU slot to accelerator card) to a many-to-many connection model through the PCIe switch. This dimensional expansion allows multiple accelerator cards to be connected through a single PCIe slot via the switch's internal switching fabric.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple accelerator cards are connected to the same PCIe bus of CPU, then computing power is increased, but resource deployment flexibility is reduced

Engineering Contradiction:
Improvecomputing powerVSAvoidresource deployment flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The PCIe switch provides dynamic resource allocation capabilities, allowing the system to dynamically assign and reassign accelerator cards to different CPU cores or processing tasks based on real-time workload requirements. This dynamic scheduling enables flexible resource deployment while maintaining high computing power.

Inventive Principle:
Principle #15Dynamics

3Productivity

If CPU computing power is increased by adding more cores, then processing capacity is improved, but internal structure complexity increases

Engineering Contradiction:
Improvecomputing powerVSAvoidinternal structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the heavy computational workload from the CPU and transfers it to dedicated accelerator cards. By offloading intensive data processing tasks to these specialized devices, the CPU's complexity is reduced while maintaining high overall processing capacity through the coordinated work of CPU and accelerators.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11366696B2System, board card and electronic device for data accelerated processing
Publication Date: 2022.06.21 CAMBRICON TECH CO LTD
  • US11366696B2 patent drawing
  • US11366696B2 patent drawing
  • US11366696B2 patent drawing

AI summary

The present disclosure relates to a system, a computing apparatus, a board card, and an electronic device for data accelerated processing. The computing apparatus may be included in a combined processing apparatus. The combined processing apparatus may also include a universal interconnection interface and other processing apparatuses. The computing apparatus interacts with other processing apparatuses to jointly complete computing operations specified by the user. The combined processing apparatus may also include a storage apparatus which is respectively connected to the computing apparatus and other processing apparatuses and is used for storing data of the computing apparatus and other processing apparatuses. The solution of the present disclosure can be applied to various electronic devices.