PCIe Switch Bridge for Multi-Server Endpoint Sharing
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Solution Overview
Problem
Current PCIe systems lack support for sharing PCIe end points across multiple servers, requiring management software and limited memory exposure, which adds latency and complexity.
Innovation Solution
A method involving a PCIe switch with a primary and secondary port configuration, where the primary port acts as a bridge and the secondary port is mapped to a server address space, allowing direct memory access and dynamic address translation to enable plug-n-play sharing of PCIe end points across servers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a PCIe switch with NTB ports is used to share PCIe end points across multiple servers, then PCIe end point sharing is enabled, but management software complexity and driver loading issues arise
Solution Approach 1:
The patent introduces a bridge device as an intermediary component between the PCIe switch and servers. This bridge translates NTB port configurations into standard PCIe end point configurations, enabling servers to recognize and automatically load drivers for shared PCIe end points without requiring complex management software intervention.
Solution Approach 2:
The system enables automatic driver loading and enumeration by configuring the PCIe hierarchy such that servers can self-identify shared PCIe end points and load appropriate drivers without external management software assistance. The bridge device facilitates this by presenting the shared end point in a standardized manner that server operating systems can automatically recognize.
2Speed
If only a portion of server memory is exposed to the PCIe switch, then memory access is enabled, but access to entire server memory space is limited and latency increases
Solution Approach 1:
The bridge device provides universal memory access capability by implementing address translation mechanisms that allow PCIe end points to access any region of server memory space. The bridge translates different address ranges to appropriate physical memory locations, enabling full memory space accessibility while maintaining direct memory access performance.
Solution Approach 2:
The system dynamically changes address space parameters through the bridge's address translation tables. By programmatically configuring these tables, the system can map various virtual address ranges to physical memory locations, enabling flexible access to entire server memory space while maintaining optimal access speeds through direct memory access paths.
3Adaptability or versatility
If extensive changes to existing device drivers are made to enable full memory space access, then memory accessibility is improved, but system complexity and latency increase
Solution Approach 1:
The bridge device serves as an intermediary that handles address translation and memory mapping, eliminating the need for extensive device driver modifications. Standard device drivers can continue to operate unchanged while the bridge transparently manages the complexity of full memory space access, maintaining both simplicity and functionality.
Data Source
AI summary
A method of accessing a server address space of a shared PCIe end point system includes programming a primary address translation table with a server address of a server address space, setting up a direct memory access (DMA) to access a primary port memory map, the primary port memory map correlating with addresses in the primary address translation table, and re-directing the direct memory accesses to the primary port memory map to the server address space according to the primary address translation table.