Embedded PCIe Switch Erasure Coding for Multi-SSD Data Protection
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Solution Overview
Problem
Current solutions for RAID data protection in NVMe SSDs, such as AIC RAID controllers, are costly, complex, and inefficient, especially for large data sets, due to physical limitations and high power consumption, and do not support erasure coding effectively across multiple storage devices.
Innovation Solution
Implementing a PCIe switch with integrated Erasure Code controller within Field Programmable Gate Arrays (FPGAs) that manages RAID engines and supports erasure coding, allowing for virtualization of storage devices and distributed data protection across multiple SSDs, reducing complexity and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If AIC RAID controllers are used to support multiple NVMe SSDs, then data protection capability is improved, but device complexity and cost increase significantly
Solution Approach 1:
The patent merges multiple RAID controller functions into a single device by integrating a PCIe switch with RAID controller capabilities. This single unified device can manage all 24 NVMe SSDs in one RAID domain, eliminating the need for six separate AIC RAID controllers and their associated management complexity.
Solution Approach 2:
The integrated PCIe switch RAID controller provides multi-functionality by combining switch fabric capabilities with RAID control functions. This universal device can handle data protection across multiple SSDs while also providing switching functionality, replacing the need for dedicated separate controllers.
2Reliability
If multiple AIC RAID controllers are deployed to support 24 NVMe SSDs, then data protection coverage is improved, but power consumption increases
Solution Approach 1:
The patent consolidates six separate power-consuming RAID controllers into a single integrated PCIe switch RAID controller. This unified device provides the same data protection coverage for 24 NVMe SSDs but with significantly reduced total power consumption by eliminating redundant controller components.
3Reliability
If AIC RAID controllers are used for RAID protection, then data protection is provided, but cost increases significantly
Solution Approach 1:
The patent merges multiple expensive AIC RAID controllers into a single cost-effective integrated PCIe switch RAID controller. This consolidation provides the same RAID data protection capability for 24 NVMe SSDs but at a fraction of the cost, avoiding the need to purchase and deploy six separate $400 controllers.
4Productivity
If multiple PCIe lanes are allocated to AIC RAID controllers, then data protection performance is improved, but CPU capability requirements and system complexity increase
Solution Approach 1:
The patent merges the PCIe lane requirements of six separate AIC RAID controllers into a single integrated PCIe switch RAID controller. This consolidation reduces the total number of PCIe lanes needed from 96 to a manageable amount, simplifying CPU configuration and reducing system complexity while maintaining data protection performance.
Data Source
AI summary
A Peripheral Component Interconnect Express (PCIe) switch with Erasure Coding logic is disclosed. The PCIe switch may include an external connector to enable the PCIe switch to communicate with a processor and at least one connector to enable the PCIe switch to communicate with at least one storage device. The PCIe switch may include a Power Processing Unit (PPU) to handle configuration of the PCIe switch. The Erasure Coding logic may include an Erasure Coding Controller with circuitry to apply an Erasure Coding scheme to data stored on the storage device, and a snooping logic including circuitry to intercept a data transmission received at the PCIe switch and modify the data transmission responsive to the Erasure Coding scheme.