PCIe Switch Non-Transparent Interconnect Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current PCIe switches are limited in their ability to non-transparently interconnect multiple bus hierarchy domains, requiring complex logic circuitry and virtual PCI buses, which leads to scalability issues and increased latency.
Innovation Solution
A PCIe switch with a non-transparent interconnect that routes packets between at least three bus hierarchy domains using a single non-transparent endpoint, eliminating the need for multiple endpoints and virtual PCI buses, thereby simplifying logic circuitry and reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a PCIe switch uses a virtual PCI bus to route packets between ports, then packet routing between bus hierarchy domains is enabled, but error recovery becomes complex and latency increases
Solution Approach 1:
The patent extracts the error recovery functionality from the virtual PCI bus and relocates it to the non-transparent interconnect. The non-transparent interconnect is responsible for monitoring packet flow and performing error recovery operations, while the virtual PCI bus is eliminated entirely. This extraction simplifies the virtual PCI bus's role and reduces overall system complexity.
Solution Approach 2:
The patent introduces a non-transparent interconnect as an intermediary component between the root complex and endpoint devices. This interconnect mediates packet routing and error recovery operations, replacing the traditional virtual PCI bus mechanism. The non-transparent interconnect provides a dedicated control path for error recovery, separating it from the data path and reducing latency.
2Adaptability or versatility
If a PCIe switch uses multiple endpoints and virtual PCI buses for non-transparent interconnection, then bus hierarchy domains can be interconnected, but logic circuitry requirements increase and scalability is limited
Solution Approach 1:
The patent merges the functions of multiple endpoints and virtual PCI buses into a single non-transparent interconnect. Instead of requiring separate endpoints and virtual buses for each bus hierarchy domain interconnection, the non-transparent interconnect provides a unified architecture that handles all interconnections through a single component, significantly reducing logic circuitry requirements.
Solution Approach 2:
The non-transparent interconnect is designed as a universal component that can interconnect any number of bus hierarchy domains. It provides multi-functional capabilities including packet routing, error recovery, and address translation in a single architecture, enabling scalable expansion without adding proportional complexity.
3Adaptability or versatility
If transparent PCI-to-PCI bridges are used to connect logical PCI busses, then address space sharing is maintained, but isolation between PCIe devices on opposite sides is lost
Solution Approach 1:
The patent extracts the address translation functionality from the transparent bridge and relocates it to the non-transparent interconnect. The non-transparent interconnect performs address translation between different bus hierarchy domains while maintaining device isolation. This extraction allows the system to achieve both address space compatibility and proper device isolation simultaneously.
Solution Approach 2:
The non-transparent interconnect acts as an intermediary that mediates address translation and device isolation. It translates addresses between different bus hierarchy domains while preventing unauthorized access to devices on opposite sides. This intermediary role enables the system to maintain compatibility while enforcing isolation boundaries.
Data Source
AI summary
A peripheral component interconnect express (PCIe) switch includes non-transparent endpoints, each of which is associated with a bus hierarchy domain. A source non-transparent endpoint in a source bus hierarchy domain receives a packet including a destination address and identifies a destination bus hierarchy domain including a destination non-transparent endpoint based on the destination address. Further, the source non-transparent endpoint translates a requester identifier in the packet to a translated requester identifier and generates a translated request packet including the translated requester identifier. The PCIe switch routes the translated request packet to the destination non-transparent endpoint through a non-transparent interconnect in the PCIe switch. In this way, the PCIe switch interconnects multiple bus hierarchy domains and is non-transparent in the multiple bus hierarchy domains. In further embodiments, the PCIe switch routes multicast packets to multiple destination non-transparent endpoints in multiple destination bus hierarchy domains.


