PCIe Switch Packet Conversion for Loop Topology Routing
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Solution Overview
Problem
Existing PCIe switch configurations are limited by the inability to form loop structures and require complex management to avoid loops and redundant paths, restricting the connection of multiple switches and increasing management complexity.
Innovation Solution
Incorporating a storage unit and identifying unit within each switch to convert PCI IDs to internal network IDs, allowing for extended PCIe packets with TLP prefixes to enable independent routing and relaxed connection limits, including loop structures and redundant paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple PCIe switches are connected in a multistage configuration, then the number of input-output devices that can be connected to a CPU is increased, but the connection method is limited and management becomes complex due to the inability to form loop structures
Solution Approach 1:
The patent introduces a packet conversion mechanism that acts as an intermediary between the CPU's PCIe protocol and the internal network protocol of the switch system. The conversion unit translates PCIe packets into internal network packets with source and destination identifiers, enabling flexible routing without requiring the CPU to understand the underlying network topology or loop structures.
Solution Approach 2:
The patent changes the parameter representation by converting PCIe device identifiers into internal network identifiers that include source and destination information. This parameter transformation allows the system to handle complex topologies including loops, while maintaining compatibility with the standard PCIe interface at the CPU side.
2Reliability
If loop structures are permitted in PCIe switch connections, then redundant paths can be created for fault tolerance, but duplicate connections must be avoided to prevent loops which limits this capability
Solution Approach 1:
The packet conversion unit serves as an intermediary that automatically manages loop prevention and redundant path routing. By inserting source and destination identifiers into packets and managing the conversion process, the system enables loop structures for redundancy without requiring manual configuration or complex management protocols.
Solution Approach 2:
The system implements self-service loop management through automatic identifier insertion and packet routing. The conversion unit automatically handles source and destination tracking, enabling the network to tolerate loops and redundant paths without requiring external management intervention or complex control protocols.
3Device complexity
If a tree structure is maintained to avoid loops, then duplicate connections are prevented, but redundant paths cannot be created which reduces fault tolerance
Solution Approach 1:
The patent transforms the connection management approach by changing packet parameters to include source and destination identifiers. This parameter enhancement allows the system to maintain simple management interfaces while internally supporting complex topologies with redundant paths and loop structures for improved fault tolerance.
Solution Approach 2:
The patent adds a new dimension to packet information by inserting source and destination identifiers that track the complete path through the network. This additional information dimension enables the system to manage complex topologies with loops and redundant paths while maintaining simple management interfaces at the CPU level.
Data Source
AI summary
A PCIe switch stores therein a first identifier used by a CPU to identify a device, a second identifier that is a common identifier to identify the device in a network formed among a plurality of switches that connect the CPU to the device, and a destination of an access request to the device in an associated manner. When having received an access request from the CPU, the PCIe switch identifies a second identifier and a destination that are associated with a first identifier included in the access request. After that, the PCIe switch adds the identified second identifier to the access request, and transmits the access request with the second identifier added to the identified destination.