PCIe Switch Port Isolation for Data Garbling Prevention
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Solution Overview
Problem
Conventional RAID devices face issues where data garbling due to abnormalities within PCIe switches leads to system downtime, as the abnormality detection mechanism fails to isolate the affected component effectively, causing data redundancy loss and system instability.
Innovation Solution
A bus communication system with a control device, communication device, and management device, where the communication device includes an abnormality detector that notifies the management device of errors, which then issues a disconnection request to the control device to disconnect the affected PCIe switch, using NTB port reset signals to isolate the faulty component and prevent data garbling propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error detection is implemented in PCIe switches, then data garbling can be detected, but the system cannot effectively isolate the faulty component, causing data redundancy loss and system downtime
Solution Approach 1:
The patent divides the PCIe switch into multiple independent ports, each with its own error detection and isolation capabilities. When an error is detected in one port, only that specific port is isolated while other ports continue to function normally, enabling granular fault containment and preventing system-wide downtime.
Solution Approach 2:
The patent implements preliminary error detection mechanisms that monitor data integrity before garbling propagates through the system. By detecting errors at the source port and immediately isolating the faulty component, the system prevents harmful effects from spreading, maintaining data redundancy and avoiding system downtime.
2Reliability
If the entire FRT is powered off to isolate abnormality, then data garbling propagation is prevented, but all connected CMs are affected causing unnecessary system disruption
Solution Approach 1:
The patent segments the FRT's power control and error isolation functions to operate at the port level rather than the entire device level. Each PCIe switch port can be independently isolated when errors are detected, allowing other ports to continue processing data transfers between CMs, thus maintaining system productivity while preventing data garbling propagation.
Solution Approach 2:
The patent applies local quality control by implementing error detection and isolation mechanisms specifically at the affected port level. The isolation action is localized to only the faulty port and its connected CM, while other ports and CMs continue to operate normally, preserving overall system availability and productivity.
3Adaptability or versatility
If NTB ports are allocated to all PCIe switch ports, then each port can be individually managed, but the system limitation prevents mounting multiple NTB ports
Solution Approach 1:
The patent makes the single NTB port universal by enabling it to be dynamically allocated to any PCIe switch port as needed. The NTB port can switch between serving different CMs and FRTs, providing individualized management capability for each port without requiring multiple physical NTB ports, thus achieving port management flexibility within system constraints.
Data Source
AI summary
The present invention includes an abnormality detector which detects abnormality which is being transferred and issues an error notification to a connection monitor, and a disconnection processor which, when receiving the error notification, disconnects connection made via a bus switch, so that it is possible to prevent propagation of abnormality when abnormality is detected in data which is being transferred.