PCI Express Bus Command Transmission Between System Chips
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Solution Overview
Problem
The existing PCI Express bus does not adequately define packet formats for transmitting system management and interrupt commands between system chips, leading to bandwidth bottlenecks and the need for new transmission interfaces.
Innovation Solution
Defining specific memory and system message packets with designated addresses to transmit commands like INTA, INTR, and EOI between system chips using the PCI Express bus, allowing for efficient command transmission and reducing the need for new interface development.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the PCI Express bus is used for data transmission between system chips, then transmission speed is improved, but the packet format for system management and interrupt commands is not adequately defined
Solution Approach 1:
The patent applies universality by making the PCI Express bus serve multiple functions: it handles both high-speed data transmission between system chips and system management/interrupt commands. The bus is configured to accommodate different packet types (memory packets and system message packets) with different purposes, allowing a single bus infrastructure to fulfill diverse communication needs without requiring separate dedicated channels for each function.
Solution Approach 2:
The patent applies parameter changes by modifying the packet format parameters of the PCI Express bus to suit system management and interrupt command transmission. Specifically, it defines new packet structures with specific address fields and data formats that differ from standard data transmission packets, enabling the bus to differentiate and properly handle various types of commands while maintaining high-speed transmission capabilities.
2Adaptability or versatility
If a new transmission interface is developed to transmit system management and interrupt commands, then command transmission capability is improved, but development cost increases
Solution Approach 1:
The patent avoids developing a new transmission interface by making the existing PCI Express bus universal. It configures the bus to handle both data transmission and system management/interrupt commands through proper packet formatting, eliminating the need for separate dedicated interfaces and reducing development costs while maintaining full command transmission capability.
Solution Approach 2:
The patent uses copying by creating packet formats that replicate the functionality of traditional system management bus protocols within the PCI Express framework. Instead of inventing entirely new communication mechanisms, it adapts and copies proven packet structures and address schemes from existing standards, modifying them to fit PCI Express requirements, thereby reducing development effort and cost.
3Productivity
If the PCI Express bus packet format is modified to transmit system management commands, then bandwidth utilization is improved, but compatibility with conventional PCI structure may be affected
Solution Approach 1:
The patent applies parameter changes by modifying specific parameters of the PCI Express packet format (such as address fields, data types, and control bits) to enable system management command transmission, while maintaining the fundamental PCI Express protocol structure. This allows full bandwidth utilization for diverse command types without compromising the core protocol's compatibility and stability.
Data Source
AI summary
A method for command transmission between systems is introduced. The command transmission between the systems, such as a north bridge chip, a south bridge chip and a central processing unit (CPU), employs the signals transmission specified by a PCI Express bus originally for the communication between system chips or peripheral devices. The signals transmission includes an interrupt or a system management instruction specified by the PCI Express bus, which further defines the specific addresses of a memory packet and a system message packet. In the preferred embodiment, the method thereof comprises the steps of transmitting an INTA command first, then a second system chip upstreams an INTR/system-management command to a first system chip. After that, the first system chip downstreams an EOI/system-management command to the second system chip.