PCIe Time Synchronization via Hardware Interface
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Solution Overview
Problem
Current PCIE devices require independent time serving devices for synchronization, leading to high costs and difficult maintenance due to the lack of defined signal for time synchronization and the large difference in reference clocks between PCIE and synchronous communications.
Innovation Solution
A method and system for PCIE devices to receive a time synchronization signal comprising a 1 pulse per second (1 PPS) signal and a Time Of Date (TOD) signal through a hardware interface, allowing the devices to perform time synchronization independently, using a clock source device that sends the signal and a time synchronization processing module to parse and utilize the signal for synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an independent time serving device is installed on each PCIE device to achieve clock and time synchronization, then time synchronization can be achieved, but the cost increases and maintenance becomes difficult
Solution Approach 1:
The patent combines the time synchronization function with the existing PCIE device architecture by integrating a time synchronization processing module that receives signals through the PCIE interface. This eliminates the need for separate independent time serving devices while maintaining synchronization capability, thereby reducing device complexity and cost.
Solution Approach 2:
The PCIE device is enhanced to perform multiple functions: its original data transmission function plus the new time synchronization function. The time synchronization processing module enables the device to receive and process synchronization signals through the existing PCIE interface, making the device universal and reducing the need for dedicated synchronization hardware.
2Reliability
If an independent time serving device is installed on each PCIE device, then time synchronization can be achieved, but the cost increases
Solution Approach 1:
The patent merges the time synchronization functionality into the PCIE device itself through an integrated processing module, eliminating the need for separate time serving devices. This integration reduces component count, lowers manufacturing costs, and simplifies the overall system architecture while maintaining synchronization reliability.
3Reliability
If an independent time serving device is installed on each PCIE device, then time synchronization can be achieved, but maintenance becomes difficult
Solution Approach 1:
By integrating the time synchronization processing module within the PCIE device architecture, the patent reduces the number of separate components that require maintenance. The synchronized function is embedded in the existing device structure, making it easier to maintain and repair compared to having separate independent time serving devices for each PCIE device.
Data Source
AI summary
Embodiments of the present invention provide a method, an apparatus, and a system for performing time synchronization on PCIE (PCI Express, peripheral component interconnect express) devices. The method mainly includes: a PCIE device receiving, through a hardware interface, a time synchronization signal sent from a clock source device; parsing, by the PCIE device, the time synchronization signal to obtain clock information carried in the time synchronization signal, and using the clock information as a clock of the PCIE device. The PCIE devices are supported to access a synchronous network, and the PCIE devices are supported to be used as a global clock source.