PCIe Write Completion via Request ID Tagging
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Solution Overview
Problem
The PCIe protocol lacks a mechanism to ensure completion of posted writes, which hinders the benefits of loose ordering in multiple data streams, potentially leading to reduced performance due to the absence of a completion signal, and proposed solutions like completion responses are rejected due to deadlock or livelock concerns.
Innovation Solution
A method is introduced to manage read/write messages in PCIe communications by using a Request Identification (RID) system, where write messages are tracked for completion, and read messages are stored until write operations are finished, ensuring that read requests are processed only after write completions are acknowledged, thereby maintaining loose ordering without deadlocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the standard mechanism for ensuring write completion in PCIe is used, then write completion is guaranteed, but the benefit of loose ordering is reduced and performance is eliminated
Solution Approach 1:
The write completion mechanism is segmented by introducing completion signals only for specific write operations that require ordering guarantees, rather than applying a universal completion mechanism to all writes. This allows loose ordering to be maintained for performance-critical paths while ensuring completion where needed.
Solution Approach 2:
The patent changes the parameter of write completion behavior by introducing conditional completion signaling based on the nature of the write operation. Different completion behaviors are applied to different write types, allowing the system to optimize performance while maintaining reliability where necessary.
2Reliability
If a proposed solution of posted write with completion response is implemented, then write completion can be tracked, but deadlock or livelock occurs under certain circumstances
Solution Approach 1:
An intermediary mechanism is introduced between the posted write and the completion response. This intermediary uses request identification (RID) tags and completion signal routing to mediate the interaction, allowing completion tracking while preventing direct circular dependencies that cause deadlock or livelock.
Solution Approach 2:
The patent implements a feedback mechanism where completion signals are routed back to the appropriate destination based on RID tags. This selective feedback approach allows the system to track completion without creating universal feedback loops that could cause deadlock or livelock conditions.
3Productivity
If multiple data streams are processed simultaneously with loose ordering, then performance is improved, but the mechanism to ensure completion of writes is insufficient
Solution Approach 1:
The patent applies preliminary action by attaching request identification (RID) tags to write operations before they are executed. This allows the system to pre-establish tracking mechanisms and completion criteria, enabling simultaneous processing of multiple streams while maintaining the ability to ensure write completion when needed.
Solution Approach 2:
The write completion mechanism is made dynamic by adjusting completion enforcement based on the specific requirements of each write operation. The system can dynamically enable or disable completion signaling for different streams and operations, allowing optimized performance while maintaining reliability where necessary.
Data Source
AI summary
A method for managing the protocol of read/write messages in a PCI Express communication link is disclosed. The method comprises maintaining queues of write requests and read requests associated with each of a plurality of request identifications that are contained in a message header, wherein the read requests associated with a request identification are held in abeyance until such time that write requests associated with the request identification are completed.