Phase Change Memory Address Offset for Current Distribution

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Solution Overview

Problem

In phase change memory devices, simultaneous driving of memory cells leads to excessive peak current concentration on near cells, causing errors that cannot be easily repaired, due to current concentration at cross-point structures using phase change materials.

Innovation Solution

Incorporating address-changing units in row and column control blocks of each Mat, except for the reference Mat, to distribute peak current by changing addresses and selecting memory cells at different positions, thereby preventing excessive current concentration on a single cell.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are simultaneously driven in all Mats, then productivity is improved, but peak current concentration occurs on near cells causing reliability degradation

Engineering Contradiction:
Improvesimultaneous driving capabilityVSAvoiderror rate in near cells
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by making each Mat have different address mapping characteristics. Specifically, Mats are divided into reference Mats and non-reference Mats, where non-reference Mats use address-changing units to offset their row and column addresses. This creates local differences in cell selection patterns across Mats, so that near cells in one Mat do not always correspond to near cells in other Mats, thereby distributing peak current concentration locally rather than globally.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The address-changing units perform preliminary action by pre-offsetting the row and column addresses in non-reference Mats before memory operations are executed. This address offsetting is done in advance for all operations, ensuring that cell selections are distributed across different physical locations before any actual memory access occurs, thus preventing peak current concentration from the outset.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If address-changing units are added to distribute peak current, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvecurrent distributionVSAvoidcontrol circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the Mats into reference Mats and non-reference Mats. Only non-reference Mats are equipped with address-changing units, creating a segmented approach where different types of Mats have different control characteristics. This segmentation reduces the overall number of address-changing units needed compared to equipping all Mats with such units, thereby moderating the increase in device complexity while still achieving current distribution.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively distributes peak current, preventing errors and malfunctions in phase change memory devices by ensuring that memory cells at different positions are selected instead of near cells, thus maintaining device reliability.

Implementation Method 1

Each of the memory cells may include a selector including a phase change material

Methodology Applied
Scientific EffectPhase change: Phase Change

Data Source

PatentUS10748610B2Phase change memory device capable of selecting memory cells with different addresses for a reference mat and non-reference mats
Publication Date: 2020.08.18 SK HYNIX INC
  • US10748610B2 patent drawing
  • US10748610B2 patent drawing
  • US10748610B2 patent drawing

AI summary

A phase change memory device may be provided. The phase change memory device may include a plurality of Mats, a row control block and a column control block. The row control block may be provided to each of the Mats to control word lines. The column control block may be provided to each of the Mats to control bit lines. When a near phase change memory cell adjacent to the row control block and the column control block is selected, the phase change memory cells located at different positions, which may be spaced apart from the near phase change memory cell, in the Mats except for a reference Mat may be selected.