PCM Array Resistor Layout for Uniform Voltage Drop
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Solution Overview
Problem
Large arrays of resistive memory cells, such as chalcogenide phase change memory (PCM) cells, experience significant resistance differences from the first memory cell to the last along a given metal line, leading to undesirable voltage drops that affect read and write performance.
Innovation Solution
The integration of a series resistor formed during heater patterning, using the same combination of materials as the heater, provides a tunable resistance to ensure uniform voltage drop across PCM devices in the array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell arrays are made large to increase storage capacity, then the quantity of memory cells increases, but the voltage drop becomes non-uniform across the array affecting read and write performance
Solution Approach 1:
The patent applies local quality by making the heater resistance non-uniform across the array. Specifically, the heater resistance is designed to decrease from the first memory cell to the last memory cell along a given metal line. This local variation in heater resistance compensates for the increasing line resistance, thereby maintaining uniform voltage drop across all memory cells despite the large array size.
2Speed
If heater resistance is reduced to improve switching speed, then the speed of phase change increases, but the voltage drop uniformity across the array deteriorates
Solution Approach 1:
The patent resolves this contradiction by implementing local quality through spatially varying heater resistance. The heater resistance is engineered to decrease from the first memory cell to the last memory cell, allowing each cell to have optimized resistance characteristics. This enables both fast switching (through appropriately low resistance) and uniform voltage drop (through the gradient compensation effect) to be achieved simultaneously across the array.
3Use of energy by moving object
If line resistance is increased to reduce current requirements, then the current consumption decreases, but the voltage drop across the array becomes non-uniform
Solution Approach 1:
The patent addresses this contradiction through local quality by designing the heater resistance to vary locally across the array. The heater resistance decreases from the first to the last memory cell, which compensates for the effects of line resistance. This allows the system to operate with lower current requirements while maintaining uniform voltage drop, as the local heater resistance adjustments offset the cumulative line resistance effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces the series resistance area by an order of magnitude, improving process margins and minimizing parasitic inductance and capacitance, thereby achieving uniform voltage distribution and enhancing read and write performance across the memory array.
Implementation Method 1
each resistance value corresponds to a distinct structural state of the chalcogenide material... The SET state is a low resistance structural state whose electrical properties are primarily controlled by the crystalline portion of the chalcogenide material. The RESET state is a high resistance structural state whose electrical properties are primarily controlled by the amorphous portion of the chalcogenide material.
Implementation Method 2
Chalcogenide materials exhibit a crystalline state or phase, as well as an amorphous state or phase. Different structural states of a chalcogenide material differ with respect to the relative proportions of the crystalline phase and amorphous phase in a given volume or region of the chalcogenide material.
Data Source
AI summary
Arrays of PCM devices and techniques for fabrication thereof having an integrated resistor formed during heater patterning for uniform voltage drop amongst the PCM devices are provided. In one aspect, a PCM device includes: at least one PCM cell including a phase change material disposed on a heater; and at least one resistor in series with the at least one PCM cell, wherein the at least one resistor includes a same combination of materials as the heater. A memory array and a method of forming a PCM device are also provided.