Bad Block Management in Phase Change Memory

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Solution Overview

Problem

Phase Change Memory (PCM) devices have a high failure rate due to limited write endurance and read drift, requiring effective bad block management to prevent data loss and maintain system performance.

Innovation Solution

Implementing a bad block management system using a controller logic that isolates failing blocks, copies their contents to a replacement block, and updates the Address Indirection Table to remap addresses, while maintaining a free block list for wear-leveling and ECC error correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If PCM devices are used to provide higher performance and endurance, then write speed and data retention are improved, but the high failure rate due to limited write endurance and read drift worsens reliability

Engineering Contradiction:
Improvewrite speedVSAvoidfailure rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary detection of bad blocks during manufacturing or early usage, and proactively remaps these blocks before they cause data loss. The controller maintains a bad block map and address translation table that are updated in advance, preventing failures rather than reacting to them after occurrence.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention creates a copy of the address mapping information in the Address Translation Table (ATT) to redirect access from bad blocks to good blocks. This copying mechanism allows the system to maintain data accessibility even when physical blocks fail, effectively decoupling logical address space from physical block status.

Inventive Principle:
Principle #26Copying

2Reliability

If bad blocks are isolated and remapped to maintain data integrity, then reliability is improved, but the complexity of memory management increases

Engineering Contradiction:
Improvedata integrityVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The controller acts as an intermediary layer between the processor and PCM device, managing bad block remapping transparently. The Address Translation Table serves as a mediator that translates logical addresses to physical addresses, automatically routing around bad blocks without requiring application-level complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The bad block management functionality is extracted into a dedicated controller component that handles detection, remapping, and table maintenance separately from the main memory operations. This modular approach isolates complexity to a specific subsystem while presenting a simplified interface to the rest of the system.

Inventive Principle:
Principle #2Taking out (Extraction)

3Quantity of substance

If the contents of retired blocks are moved to replacement blocks, then the number of usable blocks is improved, but the time required for block replacement increases

Engineering Contradiction:
Improvenumber of usable blocksVSAvoidblock replacement time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system performs background copying of data from blocks approaching failure thresholds to spare blocks before the source blocks actually fail. This proactive data migration occurs during low-utilization periods, preventing sudden data loss and avoiding time-critical emergency replacements.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller periodically scans the PCM device to detect newly formed bad blocks and updates the Address Translation Table at regular intervals. This periodic monitoring and remapping strategy balances the need for data protection with the overhead of management operations, preventing excessive replacement activity.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9418700B2Bad block management mechanism
Publication Date: 2016.08.16 TAHOE RES LTD
  • US9418700B2 patent drawing
  • US9418700B2 patent drawing
  • US9418700B2 patent drawing

AI summary

A system includes a non-volatile random access memory (NVRAM) device and controller logic that detects a bad block within the device, retires the bad block and replaces the bad block with a replacement block by assigning the address of the bad block to the replacement block.