Phase Change Memory Bottleneck Constriction Reset Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Phase change memory devices face challenges in achieving low reset current due to physical limitations in electrode and hole size reduction, which are necessary for high integration demands, making it difficult to ensure low reset currents in highly integrated devices.
Innovation Solution
A phase change memory device is designed with a semiconductor substrate, a lower electrode, an interlayer film comprising insulating films and a silicon film, and a phase change layer embedded in a hole with a silicon oxide insulator, which reduces the reset current by forming bottlenecks within the holes without decreasing the total critical dimension, allowing phase change to occur at lower currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the electrode size is reduced to lower reset current, then reset current is reduced, but manufacturing precision is limited by photolithography resolution constraints
Solution Approach 1:
The patent transitions from two-dimensional electrode area reduction to three-dimensional hole depth utilization. By forming holes through multiple layers and embedding the phase change material vertically, the effective contact area is reduced without being constrained by planar photolithography resolution, thereby achieving lower reset current while maintaining manufacturability.
Solution Approach 2:
The phase change material is nested within the hole structure, which itself is nested within the layered interlayer film system. This nested configuration allows the phase change material to be confined in a small volume without requiring high-precision lateral patterning, overcoming the photolithography resolution limit while achieving low reset current.
2Use of energy by moving object
If the hole size is reduced to lower reset current, then reset current is reduced, but device complexity increases due to fabrication limitations
Solution Approach 1:
The interlayer film is segmented into multiple layers (first insulating film, second insulating film, third insulating film) that are formed sequentially. This segmentation allows each layer to be optimized independently and simplifies the overall fabrication process by breaking down the complex hole formation into manageable steps, reducing device complexity while achieving low reset current.
Solution Approach 2:
The first insulating film, second insulating film, and third insulating film are formed in advance before the hole etching process. This preliminary action prepares the structure for subsequent hole formation and phase change material embedding, streamlining the fabrication process and reducing overall complexity while enabling precise control of the hole geometry for low reset current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the reset current necessary for phase change in phase change memory devices without limiting the total critical dimension of the holes, enabling consistent and accurate manufacturing without size constraints imposed by photolithography, thus addressing the challenge of high integration demands.
Implementation Method 1
an interlayer film formed on the semiconductor substrate having the lower electrode and including a laminate of a first insulating film, a silicon film and a second insulating film, and a hole formed therethrough; an insulator disposed along the surface of the silicon film exposed by the hole
Data Source
AI summary
A phase change memory device having a bottleneck constriction and method of making same are presented. The phase change memory device includes a semiconductor substrate, a lower electrode, an interlayer film, an insulator, a phase change layer and an upper electrode. The interlayer film is formed on the semiconductor substrate having the lower electrode. The interlayer film includes a laminate of a first insulating film, a silicon film and a second insulating film with a hole formed therethrough. The insulator is disposed along the exposed surface of the silicon film around the inner circumference of the hole. The phase change layer is embedded within the hole having the insulator which constricts the shape of the phase change layer to a bottleneck constriction. A method of manufacturing the phase change memory device is also provided.