Phase Change Memory Common Current Adjusting Block
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Solution Overview
Problem
Conventional phase change memory devices require multiple programming current adjusting blocks to independently control set and reset states, leading to increased circuit area and complexity.
Innovation Solution
A phase change memory device with a common programming current adjusting block that generates control voltages to adjust programming currents for both set and reset states, reducing the number of programming current adjusting blocks and allowing independent control of set and reset programming currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple programming current adjusting blocks are used to independently control set and reset states, then programming control precision is improved, but device complexity and circuit area increase
Solution Approach 1:
The patent merges multiple programming current adjusting blocks into a single shared adjusting block that serves both set and reset operations. This single block generates control voltages that are distributed to multiple programming current driving blocks, reducing circuit area while maintaining independent control capability through time-multiplexed operation.
Solution Approach 2:
The programming current adjusting block is designed with multi-functionality to handle both set and reset programming operations. It generates different control voltages (first control voltage for set, second control voltage for reset) that are selectively applied to programming current driving blocks based on the operation type, allowing one block to perform multiple functions.
2Measurement precision
If multiple programming current adjusting blocks are used to independently control set and reset states, then programming control precision is improved, but device complexity increases
Solution Approach 1:
The patent merges multiple programming current adjusting blocks into a single shared adjusting block that serves both set and reset operations. This single block generates control voltages that are distributed to multiple programming current driving blocks, reducing circuit area while maintaining independent control capability through time-multiplexed operation.
Solution Approach 2:
The patent segments the control function by separating the current adjusting block from the current driving blocks. The single adjusting block is segmented into different operational modes (set mode and reset mode) that generate different control voltages, while multiple driving blocks are segmented to handle different memory cells, reducing overall complexity.
3Device complexity
If a common programming current adjusting block is used for both set and reset states, then device complexity is reduced, but programming current control flexibility may be compromised
Solution Approach 1:
The patent implements dynamic control within the single programming current adjusting block by selectively generating different control voltages based on operation type. The block dynamically switches between generating first control voltages for set operations and second control voltages for reset operations, maintaining flexibility despite having a unified structure.
Solution Approach 2:
The patent changes the parameters of the control voltages generated by the adjusting block depending on the operation mode. Different voltage levels, timing characteristics, and waveform parameters are used for set versus reset operations, allowing the single block to adapt to different programming requirements through parameter variation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the overall circuit area and improves programming performance by allowing flexible generation of set and reset programming currents, enhancing the programming characteristics of phase change memory cells.
Implementation Method 1
The PCRAM device generates a convertibly phase change between a crystalline state and an amorphous state of the GST using joule heating generated by the supply of current or voltage in a certain condition for the GST.
Implementation Method 2
The phase change material includes a material that can be converted to an amorphous state or a crystalline state according to a temperature requirement
Data Source
AI summary
A phase change memory device includes a plurality of programming current driving blocks each of which is configured to provide a corresponding phase change memory cell with a programming current corresponding to input data and a programming current adjusting block commonly connected to the plurality of programming current driving blocks and configured to generate a control voltage to adjust the programming current.


