Phase Change Memory Cycle Timer for Thermal Equilibrium

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Solution Overview

Problem

Phase Change Random Access Memory (PCM) technology faces challenges due to the time required for phase change elements (PCEs) to settle into a thermal and crystal equilibrium state after a write operation, which can lead to undesired read or write attempts before the PCE is ready, causing data loss or faulty device performance.

Innovation Solution

A system and method that includes a cycle timer and a sensing circuit to monitor the resistance of a reference PCE after a write operation, preventing subsequent operations until the PCE reaches an equilibrium state, ensuring stable data storage and prolonging the usable life of the memory control system.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the phase change element is heated to high temperature for phase change operation, then the data storage capability is improved, but the time required to reach thermal equilibrium increases

Engineering Contradiction:
Improvedata storage capabilityVSAvoidtime to reach thermal equilibrium
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing a write operation on a reference PCE before actual read/write operations on the memory array. This reference operation initiates the thermal settling process in advance, allowing the system to track when thermal equilibrium is reached before permitting subsequent operations on the main memory array.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by continuously monitoring the resistance of the reference PCE after write operations. The sensing circuit detects resistance changes that indicate thermal settling progress, and this feedback information is used to control the enable signal timing, preventing operations until the reference PCE reaches equilibrium.

Inventive Principle:
Principle #23Feedback

2Productivity

If read/write operations are performed immediately after write operation, then the productivity is improved, but data integrity is compromised due to premature operations

Engineering Contradiction:
Improveoperation speedVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary write operations on reference PCEs to establish thermal baseline data before actual memory operations. This advance preparation allows the system to quickly determine when thermal equilibrium is reached, enabling fast but safe operation timing decisions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The reference PCE acts as an intermediary element that mediates between the write operation and subsequent read/write operations. By monitoring the reference PCE's thermal state through resistance measurement, the system indirectly determines the appropriate timing for main memory operations without directly interfering with the data storage process.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If a cycle timer is implemented to monitor PCE equilibrium state, then data reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidcontrol circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the cycle timer functionality with the existing sensing circuit by using the same resistance measurement capability to both sense PCE state and generate timing control signals. The sensing circuit serves dual purposes: monitoring reference PCE resistance for thermal equilibrium detection and providing feedback for operation timing control.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The reference PCE serves itself by undergoing write operations that automatically generate the thermal settling signal needed for timing control. The natural thermal relaxation process of the reference PCE after write operations provides the timing information needed to control subsequent operations, eliminating the need for external timing references.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents premature read/write operations, ensuring data integrity and extending the lifespan of the memory system by monitoring the resistance of a reference PCE and allowing operations only when it has reached a stable state, thus maintaining data reliability and device performance.

Implementation Method 1

The changing of the phase of a PCE typically requires a high temperature (e.g., above 200° C. to 900° C. depending on material properties), as can be obtained by Joule heating from current flowing through the phase change material

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Implementation Method 2

Phase Change Random Access Memory ('PCRAM' also referred to as 'PRAM' and generally as phase change memory 'PCM') is an emerging non-volatile memory technology which stores data using phase change materials

Methodology Applied
Scientific EffectPhase change: Phase Change

Implementation Method 3

Individual phase change elements (PCE) are thus used as the storage cells of a memory device. The state of an individual PCE is programmed through a heating and cooling process which is electrically controlled by passing a current through the PCE (or a discrete heating element in proximity to the PCE) and the resulting ohmic heating that occurs.

Methodology Applied
Scientific EffectElectrical resistance: Electrical Resistance

Data Source

PatentUS8520458B2Phase change memory cycle timer and method
Publication Date: 2013.08.27 MARVELL ASIA PTE LTD
  • US8520458B2 patent drawing
  • US8520458B2 patent drawing
  • US8520458B2 patent drawing

AI summary

A phase change memory (PCM) cycle timer and associated method are disclosed. A system includes at least one reference phase change element (PCE). The system also includes a circuit that performs a write operation on the at least one reference PCE and substantially immediately thereafter continuously senses and returns a value of a resistance of the at least one reference PCE throughout a settling time of the at least one reference PCE.