Phase-Change FPGA Configuration Bit Circuit for Threshold Stability
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Solution Overview
Problem
Conventional configuration bit circuits in FPGAs using phase change memory face issues with unwanted phase changes due to operating voltages exceeding the threshold voltage, leading to inaccurate signal transmission and potential data loss.
Innovation Solution
A configuration bit circuit utilizing a series connection of phase change memories with a Ge-Sb-Te composition and a transmission gate, allowing for bidirectional voltage application to maintain high threshold voltages, preventing unwanted phase changes during operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If phase change memory is used for configuration bit circuit, then area is reduced and non-volatility is achieved, but unwanted phase changes occur due to operating voltage exceeding threshold voltage
Solution Approach 1:
The configuration bit circuit is divided into multiple independent phase change memory cells (e.g., 6T1R structure with six transistors and one resistance element per bit). Each cell operates independently with controlled voltage application, preventing unwanted phase changes while maintaining area efficiency. The segmentation allows precise voltage management for each memory cell during read and write operations.
Solution Approach 2:
Sense amplifiers and voltage control circuits are introduced as intermediary components between the phase change memory cells and the read/write operations. These intermediaries buffer and regulate the voltage applied to the phase change materials, ensuring that operating voltages do not exceed the threshold voltage during normal operation, thus preventing unintended phase transitions while maintaining signal integrity.
2Ease of operation
If SRAM is used for configuration bit circuit, then volatile memory operation is achieved, but excessive area and high energy consumption are required
Solution Approach 1:
The patent replaces the conventional SRAM mechanical/electrical switching mechanism with phase change memory that utilizes phase transitions (amorphous to crystalline) for data storage. This substitution eliminates the need for continuous power supply and refresh operations required by SRAM, reducing area and energy consumption while maintaining fast access speeds through controlled phase transitions.
Solution Approach 2:
The invention exploits the phase transition properties of chalcogenide materials (amorphous to crystalline transitions) to store configuration data. The phase change memory cells use controlled heating and cooling cycles to switch between states, providing non-volatile storage with fast access times comparable to or exceeding SRAM performance, while requiring significantly less area and energy.
3Productivity
If phase change memory operates at high voltage, then programming speed is improved, but threshold voltage is exceeded causing unwanted phase changes
Solution Approach 1:
The programming operation uses periodic pulsed voltage application rather than continuous high voltage. Short, high-amplitude pulses are applied only during write operations to induce phase changes, while during read operations, lower continuous voltages are used. This periodic action maintains programming speed by using high voltage only when necessary, while ensuring phase state stability during normal operation through lower voltage levels.
Solution Approach 2:
The voltage applied to the phase change memory cells is dynamically adjusted based on the operation mode (read or write). During programming, high voltage is applied temporarily to achieve fast phase transitions, while during reading, the voltage is reduced to below the threshold level to prevent unwanted phase changes. This dynamic voltage control optimizes both programming speed and phase state stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution ensures stable operation with reduced manufacturing costs, smaller area requirements, enhanced security, and radiation resistance in FPGAs by maintaining programmed logic states and preventing unintended phase changes.
Implementation Method 1
a first phase change memory element and a second phase change memory element connected in series
Implementation Method 2
A configuration bit circuit utilizing a series connection of phase change memories with a Ge-Sb-Te composition
Data Source
AI summary
To provide a configuration bit circuit utilizing a phase change memory and an operation method thereof, the configuration bit circuit for a programmable logic device including a phase change memory may include a first phase change memory element and a second phase change memory element connected in series with each other between a first power source and a second power source, and a transmission gate connected to the first phase change memory element and second phase change memory element in a first direction.