Programmable Computational Memory Network for Dynamic Tile Reconfiguration
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Solution Overview
Problem
Programmable logic devices face challenges in efficiently communicating signals to and from their programmable logic regions due to architectural limitations, hindering flexible operation and application implementation.
Innovation Solution
A programmable device with a unified programmable computational memory (PCM) and configuration network that allows configuration data and transactional data to be transmitted through the network, enabling dynamic allocation of PCM tiles between computation and memory regions and facilitating flexible operation by reconfiguring the device for different applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a unified configuration network is implemented to transmit both configuration data and transactional data, then communication efficiency is improved, but device complexity increases
Solution Approach 1:
The configuration network is designed to perform multiple functions: transmitting configuration data during programming modes and transmitting transactional data during operational modes. This multi-functional approach eliminates the need for separate dedicated networks, improving communication efficiency while managing complexity through unified protocol design.
Solution Approach 2:
The network dynamically switches between different data transmission modes based on operational requirements. During configuration modes, the network transmits setup data; during operational modes, it transmits transactional data. This dynamic adaptability allows efficient resource utilization without permanent dedicated pathways for each data type.
2Adaptability or versatility
If PCM tiles are dynamically allocated between fabric and memory regions, then adaptability is improved, but control complexity increases
Solution Approach 1:
The PCM array is divided into multiple independently controllable PCM tiles, each capable of being allocated to either fabric or memory regions. This segmentation allows flexible dynamic allocation where individual tiles can be assigned based on application requirements, improving adaptability while managing control complexity through modular addressing and configuration.
Solution Approach 2:
The system performs preliminary configuration of PCM tile allocations before operational modes begin. Configuration data pre-establishes which PCM tiles belong to fabric regions and which belong to memory regions, allowing the system to start operation with optimized allocations already in place, thereby reducing real-time control complexity.
3Adaptability or versatility
If reconfiguration capability is added to support different applications, then versatility is improved, but operation time increases
Solution Approach 1:
The system loads and stores configuration data in advance, preparing the device for specific applications before operational modes begin. This preliminary configuration allows the device to be pre-programmed with application-specific settings, reducing the time required during actual operation and enabling faster switching between applications through pre-prepared configuration sets.
Solution Approach 2:
The system employs periodic configuration modes where reconfiguration occurs at predetermined intervals or when specific triggers are detected. This structured approach to reconfiguration allows the system to maintain stable operational modes for extended periods while periodically updating configurations, thereby managing reconfiguration time through scheduled rather than continuous changes.
Data Source
AI summary
Examples generally relate a programmable device having a unified programmable computational memory (PCM) and configuration network. In an example, a programmable device includes a die that includes a PCM integrated circuit having a PCM tile. The PCM tile includes a configuration memory (CM) and combinational logic (CL). The CM is capable of storing configuration data received via a node in the PCM tile. The CL is configured to receive internal control signal(s) and first and second input signals and to output a result signal. The CL is capable of outputting the result signal resulting from a logic function that is responsive to the internal control signal(s) and a signal of a group of signals including the first and second input signals. The CL is configured to receive the first input signal via the node in the PCM tile.