Phase Change Memory Programming Speed via Segmented Pulse Width
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Solution Overview
Problem
The speed of phase change memory devices is limited by the time required to set a memory cell to the crystalline state, which is determined by the slowest cell in the array, necessitating a need for improved programming strategies to enhance speed while maintaining data integrity.
Innovation Solution
An integrated circuit with a memory array that applies a set pulse with a reduced pulse width based on a predetermined error percentage, allowing for a controlled number of memory cells to fail, thereby increasing overall speed, and utilizing an error correction code to correct data errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the set pulse width is reduced to increase memory speed, then the programming speed improves, but the reliability deteriorates due to increased failure rate of memory cells
Solution Approach 1:
The memory array is divided into multiple banks, and the set operation is segmented into multiple sequential pulses applied to different banks. This allows the total set operation to be completed faster while maintaining reliability through distributed processing and error correction coding across banks.
Solution Approach 2:
The system incorporates error correction coding that provides feedback about failed memory cells. This feedback mechanism allows the system to identify and correct errors caused by reduced pulse width, enabling faster programming while maintaining data integrity through iterative correction.
2Reliability
If the set pulse width is increased to ensure error-free memory, then the reliability improves, but the programming speed deteriorates
Solution Approach 1:
Instead of applying one excessively long pulse to all cells, the system applies multiple partial pulses to different banks sequentially. The sum of these partial pulses achieves the same total crystallization effect while reducing the time any single cell spends in the high-stress state, thereby maintaining reliability without sacrificing speed.
Solution Approach 2:
The system changes the parameter of pulse width from a single long duration to multiple shorter durations distributed across different banks. This parameter transformation allows the memory to achieve both fast programming and high reliability by optimizing the temporal distribution of energy delivery.
3Reliability
If a single long set pulse is applied to ensure all memory cells are set, then the reliability improves, but the productivity deteriorates due to the slowest cell bottleneck
Solution Approach 1:
The memory array is segmented into multiple banks that can be processed in parallel or sequential batches. By dividing the population of memory cells into smaller groups, the system eliminates the bottleneck caused by the slowest cell affecting the entire array, thereby improving overall productivity while maintaining reliability through error correction.
Solution Approach 2:
Instead of applying a single continuous long pulse, the system uses periodic action by applying multiple shorter pulses in sequence to different banks. This periodic approach allows the memory system to maintain high productivity by keeping the programming pipeline continuously active across different bank groups while ensuring each cell receives adequate energy for reliable setting.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases the speed of phase change memory devices by reducing the set pulse width, with error correction ensuring data integrity, potentially increasing speed by factors of five to ten compared to error-free memory devices for tolerant applications.
Implementation Method 1
The phase change material exhibits at least two different states. The states of the phase change material may be referred to as the amorphous state and the crystalline state... Phase changes in the phase change materials may be induced reversibly... The temperature changes of the phase change material may be achieved by driving current through the phase change material itself or by driving current through a resistive heater adjacent the phase change material.
Implementation Method 2
The temperature changes of the phase change material may be achieved by driving current through the phase change material itself or by driving current through a resistive heater adjacent the phase change material. With both of these methods, controllable heating of the phase change material causes controllable phase change within the phase change material.
Data Source
AI summary
An integrated circuit includes an array of resistance changing memory cells. The array includes a first portion. The integrated circuit includes a circuit configured to apply a set pulse having a first pulse width to a first memory cell in the first portion to set the first memory cell. The first pulse width is based on a predetermined error percentage for the first portion.