Phase Change Memory Sequential Programming System
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Solution Overview
Problem
Low-voltage transistor architectures in phase change memory (PCM) devices result in overhead time during programming operations, which can decrease throughput, especially during sequential writing, potentially losing the speed advantage over other non-volatile memory types.
Innovation Solution
Implementing a system and method that allows for sequential programming of a block of data within a single column path, separating RESET and SET operations to minimize overhead time, using a control logic with a Finite State Machine to manage biasing and decoding operations, and utilizing high-voltage circuitry for efficient voltage boosting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If low-voltage transistor architecture is used in PCM devices, then manufacturing complexity and current consumption are reduced, but overhead time during programming operations increases, decreasing throughput
Solution Approach 1:
The programming operation is segmented into two separate phases: a first programming phase that performs initial programming with low-voltage transistors, and a second programming phase that performs additional programming to complete the data writing. This segmentation allows the system to maintain low-voltage architecture benefits while achieving complete programming functionality, thereby resolving the contradiction between manufacturing complexity and throughput.
Solution Approach 2:
The first programming phase performs preliminary programming actions that prepare the memory cell state, reducing the burden on subsequent operations. By performing preliminary programming with low-voltage transistors, the system establishes a foundation that enables complete programming without requiring full-voltage overhead, thus improving throughput while maintaining manufacturing simplicity.
2Use of energy by moving object
If low-voltage transistor architecture is used in PCM devices, then current consumption is reduced, but overhead time during programming operations increases, decreasing throughput
Solution Approach 1:
The programming operation is divided into two phases where the first phase uses low-voltage transistors for initial programming with reduced current consumption, and the second phase completes the programming. This segmentation maintains energy efficiency while achieving complete programming functionality, resolving the contradiction between current consumption and throughput.
Solution Approach 2:
The system dynamically switches between low-voltage and high-voltage operating modes across different programming phases. The low-voltage mode is used for initial programming to reduce current consumption, while the high-voltage mode is activated in the second phase to complete programming efficiently, thereby achieving both low energy consumption and high throughput.
3Adaptability or versatility
If sequential writing is performed in PCM devices with low-voltage transistors, then data block programming is enabled, but overhead time increases due to biasing preparation and release, losing speed advantage
Solution Approach 1:
Sequential writing operations are segmented into first and second programming phases. The first phase performs initial programming for multiple data blocks with minimized biasing overhead, while the second phase completes the programming. This segmentation reduces the cumulative overhead time associated with biasing preparation and release, thereby maintaining programming speed advantage while enabling sequential writing capability.
Solution Approach 2:
The two-phase programming approach enables continuous useful action during sequential writing. By performing initial programming in the first phase and completing programming in the second phase across multiple data blocks, the system maintains continuous productive operation rather than repeatedly entering and exiting biasing states, thus preserving speed advantage while enabling versatile sequential writing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains the advantages of low-voltage transistor use, such as reduced current consumption and manufacturing complexity, while achieving high throughput during sequential writing, retaining speed advantages over other non-volatile memories like EEPROM and Flash.
Implementation Method 1
this electric current, by the Joule effect, generates the temperatures required for the phase change
Implementation Method 2
the characteristics of materials having the property of switching between phases having different electrical characteristics are exploited. These materials may switch between an amorphous, disorderly, phase and a crystalline or polycrystalline, orderly, phase
Data Source
AI summary
A phase change non-volatile memory device has a memory array with a plurality of memory cells arranged in rows and columns, a column decoder and a row decoder designed to select columns, and, respectively, rows of the memory array during operations of programming of corresponding memory cells. A control logic, coupled to the column decoder and the row decoder, is designed to execute a sequential programming command, to control the column decoder and row decoder to select one column of the memory array and execute sequential programming operations on a desired block of memory cells belonging to contiguous selected rows of the selected column.