Multi-Step Current Profile for Phase Change Memory SET Operations

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Solution Overview

Problem

Current SET algorithms for phase change memory (PCM) are inefficient in scaling to smaller geometries, leading to increased write latency and bit error rates due to insufficient crystal nuclei and crystalline area, which limits the effectiveness of data transition to a crystalline state.

Innovation Solution

A multi-step current profile is applied to PCM memory cells, comprising a nucleation stage at a lower temperature to generate crystal nuclei followed by multiple steps at higher temperatures to promote crystal growth, optimizing the crystallization process through controlled current application.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a fixed ramp rate is used for SET algorithm, then the crystallization process is simplified, but write latency increases and crystallization effectiveness decreases in smaller geometries

Engineering Contradiction:
ImproveSET algorithm complexityVSAvoidwrite latency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The SET algorithm is segmented into multiple distinct current pulses with different amplitudes and durations. The first pulse creates crystal nuclei, while subsequent pulses promote crystal growth. This segmentation allows optimization of each pulse's parameters to specifically target different stages of crystallization, reducing overall write latency while improving effectiveness in scaled geometries.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The current profile transitions from a static fixed ramp rate to a dynamic multi-step profile where current amplitude and duration are adjusted based on the crystallization stage. The algorithm dynamically adapts the heating profile to match the temporal and thermal requirements of nucleation versus growth phases, optimizing write speed and reliability.

Inventive Principle:
Principle #15Dynamics

2Area of moving object

If memory cell size is reduced for scaling, then memory density increases, but crystal nuclei formation becomes insufficient leading to higher bit error rates

Engineering Contradiction:
Improvememory cell areaVSAvoidbit error rate
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The first current pulse is specifically designed to perform preliminary action by creating crystal nuclei before the main growth phase. This preliminary nucleation step ensures that even in reduced geometries, sufficient crystal nuclei are formed to initiate reliable crystallization, thereby reducing bit error rates while maintaining scaled cell dimensions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The current profile parameters (amplitude, duration, timing) are changed and optimized for each crystallization stage. The first pulse uses parameters optimized for nucleation, while subsequent pulses use parameters optimized for growth. This parameter optimization ensures reliable crystallization in scaled geometries where thermal dynamics differ from larger cells.

Inventive Principle:
Principle #35Parameter changes

3Loss of time

If a single current pulse is used for crystallization, then the process is faster, but crystal growth is insufficient leading to incomplete SET state

Engineering Contradiction:
Improvecrystallization timeVSAvoidcrystalline state completeness
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The crystallization process is segmented into multiple current pulses, each targeting a specific stage. The first pulse initiates nucleation, while subsequent pulses drive crystal growth to completion. This segmentation ensures both speed and completeness by optimizing each pulse's duration and amplitude for its specific purpose, avoiding the need for a single excessively long pulse.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The multi-step current profile maintains continuous useful action on the PCM throughout the crystallization process. Rather than a single脉冲 followed by idle time, the algorithm applies a sequence of pulses that continuously drive the crystallization forward through different stages, ensuring complete SET state achievement while minimizing total time.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces write latency and bit error rates by ensuring effective transition to a crystalline state, enhancing the scalability and efficiency of PCM-based memory cells while maintaining data integrity.

Implementation Method 1

a first current to heat the phase change material to a first temperature to promote nucleation of a crystalline state of the PCM

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Implementation Method 2

Phase change materials (PCMs) are based on a property of certain compounds to take on one of two or more states based on heat applied to the material(s) included in PCMs

Methodology Applied
Scientific EffectPhase change: Phase Change

Implementation Method 3

a first current to heat the phase change material to a first temperature to promote nucleation of a crystalline state of the PCM

Methodology Applied
Scientific EffectNucleation: Nucleation

Data Source

PatentUS11810617B2Techniques for a multi-step current profile for a phase change memory
Publication Date: 2023.11.07 INTEL CORP
  • US11810617B2 patent drawing
  • US11810617B2 patent drawing
  • US11810617B2 patent drawing

AI summary

Examples may include techniques to implement a SET write operation to a selected memory cell include in a memory array. Examples include selecting the memory cell that includes phase change material and applying various currents over various periods of time during a nucleation stage and a crystal growth stage to cause the memory cell to be in a SET logical state.